forked from luck/tmp_suning_uos_patched
5e63b85a48
commit fff53a551db50f5edecaa0b29a64056ab8d2bbca upstream.
This patch fixes 2 problems:
[1] The output warning logs and data loss when performing
mount/umount then remount the device with jffs2 format.
[2] The access width of SMWDR[0:1]/SMRDR[0:1] register is wrong.
This is the sample warning logs when performing mount/umount then
remount the device with jffs2 format:
jffs2: jffs2_scan_inode_node(): CRC failed on node at 0x031c51d4:
Read 0x00034e00, calculated 0xadb272a7
The reason for issue [1] is that the writing data seems to
get messed up.
Data is only completed when the number of bytes is divisible by 4.
If you only have 3 bytes of data left to write, 1 garbage byte
is inserted after the end of the write stream.
If you only have 2 bytes of data left to write, 2 bytes of '00'
are added into the write stream.
If you only have 1 byte of data left to write, 2 bytes of '00'
are added into the write stream. 1 garbage byte is inserted after
the end of the write stream.
To solve problem [1], data must be written continuously in serial
and the write stream ends when data is out.
Following HW manual 62.2.15, access to SMWDR0 register should be
in the same size as the transfer size specified in the SPIDE[3:0]
bits in the manual mode enable setting register (SMENR).
Be sure to access from address 0.
So, in 16-bit transfer (SPIDE[3:0]=b'1100), SMWDR0 should be
accessed by 16-bit width.
Similar to SMWDR1, SMDDR0/1 registers.
In current code, SMWDR0 register is accessed by regmap_write()
that only set up to do 32-bit width.
To solve problem [2], data must be written 16-bit or 8-bit when
transferring 1-byte or 2-byte.
Fixes: ca7d8b980b ("memory: add Renesas RPC-IF driver")
Cc: <stable@vger.kernel.org>
Signed-off-by: Duc Nguyen <duc.nguyen.ub@renesas.com>
[wsa: refactored to use regmap only via reg_read/reg_write]
Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Tested-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Link: https://lore.kernel.org/r/20210922091007.5516-1-wsa+renesas@sang-engineering.com
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
89 lines
1.6 KiB
C
89 lines
1.6 KiB
C
/* SPDX-License-Identifier: GPL-2.0 */
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/*
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* Renesas RPC-IF core driver
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*
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* Copyright (C) 2018~2019 Renesas Solutions Corp.
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* Copyright (C) 2019 Macronix International Co., Ltd.
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* Copyright (C) 2019-2020 Cogent Embedded, Inc.
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*/
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#ifndef __RENESAS_RPC_IF_H
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#define __RENESAS_RPC_IF_H
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#include <linux/types.h>
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enum rpcif_data_dir {
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RPCIF_NO_DATA,
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RPCIF_DATA_IN,
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RPCIF_DATA_OUT,
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};
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struct rpcif_op {
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struct {
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u8 buswidth;
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u8 opcode;
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bool ddr;
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} cmd, ocmd;
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struct {
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u8 nbytes;
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u8 buswidth;
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bool ddr;
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u64 val;
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} addr;
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struct {
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u8 ncycles;
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u8 buswidth;
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} dummy;
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struct {
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u8 nbytes;
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u8 buswidth;
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bool ddr;
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u32 val;
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} option;
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struct {
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u8 buswidth;
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unsigned int nbytes;
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enum rpcif_data_dir dir;
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bool ddr;
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union {
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void *in;
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const void *out;
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} buf;
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} data;
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};
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struct rpcif {
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struct device *dev;
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void __iomem *base;
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void __iomem *dirmap;
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struct regmap *regmap;
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struct reset_control *rstc;
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size_t size;
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enum rpcif_data_dir dir;
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u8 bus_size;
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void *buffer;
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u32 xferlen;
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u32 smcr;
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u32 smadr;
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u32 command; /* DRCMR or SMCMR */
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u32 option; /* DROPR or SMOPR */
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u32 enable; /* DRENR or SMENR */
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u32 dummy; /* DRDMCR or SMDMCR */
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u32 ddr; /* DRDRENR or SMDRENR */
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};
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int rpcif_sw_init(struct rpcif *rpc, struct device *dev);
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void rpcif_hw_init(struct rpcif *rpc, bool hyperflash);
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void rpcif_enable_rpm(struct rpcif *rpc);
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void rpcif_disable_rpm(struct rpcif *rpc);
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void rpcif_prepare(struct rpcif *rpc, const struct rpcif_op *op, u64 *offs,
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size_t *len);
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int rpcif_manual_xfer(struct rpcif *rpc);
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ssize_t rpcif_dirmap_read(struct rpcif *rpc, u64 offs, size_t len, void *buf);
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#endif // __RENESAS_RPC_IF_H
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