forked from luck/tmp_suning_uos_patched
1c739c7f37
This patch fixes on inclusion <mach/gpio.h> to <linux/gpio.h> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com> Cc: Ben Dooks <ben-linux@fluff.org>
124 lines
3.0 KiB
C
124 lines
3.0 KiB
C
/* linux/arch/arm/mach-s5p6442/dev-spi.c
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*
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* Copyright (C) 2010 Samsung Electronics Co. Ltd.
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* Jaswinder Singh <jassi.brar@samsung.com>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#include <linux/platform_device.h>
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#include <linux/dma-mapping.h>
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#include <linux/gpio.h>
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#include <mach/dma.h>
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#include <mach/map.h>
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#include <mach/irqs.h>
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#include <mach/spi-clocks.h>
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#include <plat/s3c64xx-spi.h>
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#include <plat/gpio-cfg.h>
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static char *spi_src_clks[] = {
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[S5P6442_SPI_SRCCLK_PCLK] = "pclk",
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[S5P6442_SPI_SRCCLK_SCLK] = "spi_epll",
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};
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/* SPI Controller platform_devices */
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/* Since we emulate multi-cs capability, we do not touch the CS.
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* The emulated CS is toggled by board specific mechanism, as it can
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* be either some immediate GPIO or some signal out of some other
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* chip in between ... or some yet another way.
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* We simply do not assume anything about CS.
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*/
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static int s5p6442_spi_cfg_gpio(struct platform_device *pdev)
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{
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switch (pdev->id) {
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case 0:
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s3c_gpio_cfgpin(S5P6442_GPB(0), S3C_GPIO_SFN(2));
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s3c_gpio_cfgpin(S5P6442_GPB(2), S3C_GPIO_SFN(2));
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s3c_gpio_cfgpin(S5P6442_GPB(3), S3C_GPIO_SFN(2));
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s3c_gpio_setpull(S5P6442_GPB(0), S3C_GPIO_PULL_UP);
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s3c_gpio_setpull(S5P6442_GPB(2), S3C_GPIO_PULL_UP);
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s3c_gpio_setpull(S5P6442_GPB(3), S3C_GPIO_PULL_UP);
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break;
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default:
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dev_err(&pdev->dev, "Invalid SPI Controller number!");
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return -EINVAL;
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}
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return 0;
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}
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static struct resource s5p6442_spi0_resource[] = {
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[0] = {
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.start = S5P6442_PA_SPI,
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.end = S5P6442_PA_SPI + 0x100 - 1,
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.flags = IORESOURCE_MEM,
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},
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[1] = {
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.start = DMACH_SPI0_TX,
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.end = DMACH_SPI0_TX,
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.flags = IORESOURCE_DMA,
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},
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[2] = {
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.start = DMACH_SPI0_RX,
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.end = DMACH_SPI0_RX,
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.flags = IORESOURCE_DMA,
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},
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[3] = {
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.start = IRQ_SPI0,
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.end = IRQ_SPI0,
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.flags = IORESOURCE_IRQ,
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},
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};
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static struct s3c64xx_spi_info s5p6442_spi0_pdata = {
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.cfg_gpio = s5p6442_spi_cfg_gpio,
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.fifo_lvl_mask = 0x1ff,
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.rx_lvl_offset = 15,
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};
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static u64 spi_dmamask = DMA_BIT_MASK(32);
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struct platform_device s5p6442_device_spi = {
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.name = "s3c64xx-spi",
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.id = 0,
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.num_resources = ARRAY_SIZE(s5p6442_spi0_resource),
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.resource = s5p6442_spi0_resource,
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.dev = {
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.dma_mask = &spi_dmamask,
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.coherent_dma_mask = DMA_BIT_MASK(32),
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.platform_data = &s5p6442_spi0_pdata,
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},
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};
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void __init s5p6442_spi_set_info(int cntrlr, int src_clk_nr, int num_cs)
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{
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struct s3c64xx_spi_info *pd;
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/* Reject invalid configuration */
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if (!num_cs || src_clk_nr < 0
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|| src_clk_nr > S5P6442_SPI_SRCCLK_SCLK) {
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printk(KERN_ERR "%s: Invalid SPI configuration\n", __func__);
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return;
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}
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switch (cntrlr) {
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case 0:
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pd = &s5p6442_spi0_pdata;
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break;
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default:
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printk(KERN_ERR "%s: Invalid SPI controller(%d)\n",
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__func__, cntrlr);
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return;
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}
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pd->num_cs = num_cs;
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pd->src_clk_nr = src_clk_nr;
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pd->src_clk_name = spi_src_clks[src_clk_nr];
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}
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