AcoSail/kernel_optimize_test
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kernel_optimize_test/arch/mips/sibyte
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Maciej W. Rozycki 8ff374b9c2 MIPS: Cleanup CP0 PRId and CP1 FPIR register access masks 
Replace hardcoded CP0 PRId and CP1 FPIR register access masks throughout.
The change does not touch places that use shifted or partial masks.

Signed-off-by: Maciej W. Rozycki <macro@linux-mips.org>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/5838/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2013-09-18 20:25:19 +02:00
..
bcm1480 MIPS: Cleanup CP0 PRId and CP1 FPIR register access masks 2013-09-18 20:25:19 +02:00
common MIPS: Sibyte: Fix bus watcher build for BCM1x55 and BCM1x80. 2013-06-21 18:07:02 +02:00
sb1250 MIPS: Cleanup CP0 PRId and CP1 FPIR register access masks 2013-09-18 20:25:19 +02:00
swarm
Kconfig MIPS: sibyte: Amend dependencies for SIBYTE_BUS_WATCHER 2013-06-21 18:07:03 +02:00
Makefile
Platform Merge branch '3.10-fixes' into mips-for-linux-next 2013-07-12 18:11:43 +02:00