forked from luck/tmp_suning_uos_patched
f7e4217b00
This finally renames the thread_info field in task structure to stack, so that the assumptions about this field are gone and archs have more freedom about placing the thread_info structure. Nonbroken archs which have a proper thread pointer can do the access to both current thread and task structure via a single pointer. It'll allow for a few more cleanups of the fork code, from which e.g. ia64 could benefit. Signed-off-by: Roman Zippel <zippel@linux-m68k.org> [akpm@linux-foundation.org: build fix] Cc: Richard Henderson <rth@twiddle.net> Cc: Ivan Kokshaysky <ink@jurassic.park.msu.ru> Cc: Russell King <rmk@arm.linux.org.uk> Cc: Ian Molton <spyro@f2s.com> Cc: Haavard Skinnemoen <hskinnemoen@atmel.com> Cc: Mikael Starvik <starvik@axis.com> Cc: David Howells <dhowells@redhat.com> Cc: Yoshinori Sato <ysato@users.sourceforge.jp> Cc: "Luck, Tony" <tony.luck@intel.com> Cc: Hirokazu Takata <takata@linux-m32r.org> Cc: Geert Uytterhoeven <geert@linux-m68k.org> Cc: Roman Zippel <zippel@linux-m68k.org> Cc: Greg Ungerer <gerg@uclinux.org> Cc: Ralf Baechle <ralf@linux-mips.org> Cc: Ralf Baechle <ralf@linux-mips.org> Cc: Paul Mackerras <paulus@samba.org> Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org> Cc: Heiko Carstens <heiko.carstens@de.ibm.com> Cc: Martin Schwidefsky <schwidefsky@de.ibm.com> Cc: Paul Mundt <lethal@linux-sh.org> Cc: Kazumoto Kojima <kkojima@rr.iij4u.or.jp> Cc: Richard Curnow <rc@rc0.org.uk> Cc: William Lee Irwin III <wli@holomorphy.com> Cc: "David S. Miller" <davem@davemloft.net> Cc: Jeff Dike <jdike@addtoit.com> Cc: Paolo 'Blaisorblade' Giarrusso <blaisorblade@yahoo.it> Cc: Miles Bader <uclinux-v850@lsi.nec.co.jp> Cc: Andi Kleen <ak@muc.de> Cc: Chris Zankel <chris@zankel.net> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org> |
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This port to the NEC V850E processor supports the following platforms: "sim" The gdb v850e simulator (CONFIG_V850E_SIM). "rte-ma1-cb" The Midas labs RTE-V850E/MA1-CB and RTE-V850E/NB85E-CB evaluation boards (CONFIG_RTE_CB_MA1 and CONFIG_RTE_CB_NB85E). This support has only been tested when running with the Multi-debugger monitor ROM (for the Green Hills Multi debugger). The optional NEC Solution Gear RTE-MOTHER-A motherboard is also supported, which allows PCI boards to be used (CONFIG_RTE_MB_A_PCI). "rte-me2-cb" The Midas labs RTE-V850E/ME2-CB evaluation board (CONFIG_RTE_CB_ME2). This has only been tested using a kernel downloaded via an ICE connection using the Multi debugger. Support for the RTE-MOTHER-A is present, but hasn't been tested (unlike the other Midas labs cpu boards, the RTE-V850E/ME2-CB includes an ethernet adaptor). "as85ep1" The NEC AS85EP1 V850E evaluation chip/board (CONFIG_V850E_AS85EP1). "anna" The NEC `Anna' (board/chip) implementation of the V850E2 processor (CONFIG_V850E2_ANNA). "sim85e2c", "sim85e2s" The sim85e2c and sim85e2s simulators, which are verilog simulations of the V850E2 NA85E2C/NA85E2S cpu cores (CONFIG_V850E2_SIM85E2C and CONFIG_V850E2_SIM85E2S). "fpga85e2c" A FPGA implementation of the V850E2 NA85E2C cpu core (CONFIG_V850E2_FPGA85E2C). To get a default kernel configuration for a particular platform, you can use a <platform>_defconfig make target (e.g., "make rte-me2-cb_defconfig"); to see which default configurations are possible, look in the directory "arch/v850/configs". Porting to anything with a V850E/MA1 or MA2 processor should be simple. See the file <asm-v850/machdep.h> and the files it includes for an example of how to add platform/chip-specific support.