Paul Burton b6d5e47e67 MIPS: SEAD3: Probe interrupt controllers using DT ... Probe the CPU interrupt controller & optional Global Interrupt Controller (GIC) using devicetree rather than platform code. Because the bootloader on SEAD3 does not provide a device tree to the kernel & the device tree is always built in, we patch out the GIC node during boot if we detect that a GIC is not present in the system. The appropriate IRQ domain is discovered by platform code setting up device IRQ numbers temporarily. It will be removed by further patches which move the devices towards being probed via device tree. No behavioural change is intended by this patch. Signed-off-by: Paul Burton <paul.burton@imgtec.com> Cc: Matt Redfearn <matt.redfearn@imgtec.com> Cc: Kefeng Wang <wangkefeng.wang@huawei.com> Cc: Jacek Anaszewski <j.anaszewski@samsung.com> Cc: Rob Herring <robh+dt@kernel.org> Cc: Mark Rutland <mark.rutland@arm.com> Cc: linux-mips@linux-mips.org Cc: devicetree@vger.kernel.org Cc: linux-kernel@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/14047/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>		2016-10-05 01:31:20 +02:00
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cpu-feature-overrides.h	MIPS: microMIPS: Disable LL/SC and fix linker bug.	2013-05-09 17:55:19 +02:00
irq.h	irqchip: mips-gic: Probe for number of external interrupts	2014-11-24 07:44:56 +01:00
kernel-entry-init.h	MIPS: MT: Remove SMTC support	2014-05-24 00:07:01 +02:00
sead3-dtshim.h	MIPS: SEAD3: Probe interrupt controllers using DT	2016-10-05 01:31:20 +02:00
war.h