kernel_optimize_test/arch/arm/lib
Ivan Djelic 455bd4c430 ARM: 7668/1: fix memset-related crashes caused by recent GCC (4.7.2) optimizations
Recent GCC versions (e.g. GCC-4.7.2) perform optimizations based on
assumptions about the implementation of memset and similar functions.
The current ARM optimized memset code does not return the value of
its first argument, as is usually expected from standard implementations.

For instance in the following function:

void debug_mutex_lock_common(struct mutex *lock, struct mutex_waiter *waiter)
{
	memset(waiter, MUTEX_DEBUG_INIT, sizeof(*waiter));
	waiter->magic = waiter;
	INIT_LIST_HEAD(&waiter->list);
}

compiled as:

800554d0 <debug_mutex_lock_common>:
800554d0:       e92d4008        push    {r3, lr}
800554d4:       e1a00001        mov     r0, r1
800554d8:       e3a02010        mov     r2, #16 ; 0x10
800554dc:       e3a01011        mov     r1, #17 ; 0x11
800554e0:       eb04426e        bl      80165ea0 <memset>
800554e4:       e1a03000        mov     r3, r0
800554e8:       e583000c        str     r0, [r3, #12]
800554ec:       e5830000        str     r0, [r3]
800554f0:       e5830004        str     r0, [r3, #4]
800554f4:       e8bd8008        pop     {r3, pc}

GCC assumes memset returns the value of pointer 'waiter' in register r0; causing
register/memory corruptions.

This patch fixes the return value of the assembly version of memset.
It adds a 'mov' instruction and merges an additional load+store into
existing load/store instructions.
For ease of review, here is a breakdown of the patch into 4 simple steps:

Step 1
======
Perform the following substitutions:
ip -> r8, then
r0 -> ip,
and insert 'mov ip, r0' as the first statement of the function.
At this point, we have a memset() implementation returning the proper result,
but corrupting r8 on some paths (the ones that were using ip).

Step 2
======
Make sure r8 is saved and restored when (! CALGN(1)+0) == 1:

save r8:
-       str     lr, [sp, #-4]!
+       stmfd   sp!, {r8, lr}

and restore r8 on both exit paths:
-       ldmeqfd sp!, {pc}               @ Now <64 bytes to go.
+       ldmeqfd sp!, {r8, pc}           @ Now <64 bytes to go.
(...)
        tst     r2, #16
        stmneia ip!, {r1, r3, r8, lr}
-       ldr     lr, [sp], #4
+       ldmfd   sp!, {r8, lr}

Step 3
======
Make sure r8 is saved and restored when (! CALGN(1)+0) == 0:

save r8:
-       stmfd   sp!, {r4-r7, lr}
+       stmfd   sp!, {r4-r8, lr}

and restore r8 on both exit paths:
        bgt     3b
-       ldmeqfd sp!, {r4-r7, pc}
+       ldmeqfd sp!, {r4-r8, pc}
(...)
        tst     r2, #16
        stmneia ip!, {r4-r7}
-       ldmfd   sp!, {r4-r7, lr}
+       ldmfd   sp!, {r4-r8, lr}

Step 4
======
Rewrite register list "r4-r7, r8" as "r4-r8".

Signed-off-by: Ivan Djelic <ivan.djelic@parrot.com>
Reviewed-by: Nicolas Pitre <nico@linaro.org>
Signed-off-by: Dirk Behme <dirk.behme@gmail.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2013-03-07 16:14:22 +00:00
..
ashldi3.S
ashrdi3.S
backtrace.S ARM: 7068/1: process: change from __backtrace to dump_stack in show_regs 2011-10-17 09:12:41 +01:00
bitops.h ARM: 7171/1: unwind: add unwind directives to bitops assembly macros 2011-11-26 21:58:53 +00:00
call_with_stack.S ARM: lib: add call_with_stack function for safely changing stack 2011-12-12 16:07:35 +00:00
changebit.S ARM: 7171/1: unwind: add unwind directives to bitops assembly macros 2011-11-26 21:58:53 +00:00
clear_user.S
clearbit.S ARM: 7171/1: unwind: add unwind directives to bitops assembly macros 2011-11-26 21:58:53 +00:00
copy_from_user.S
copy_page.S
copy_template.S
copy_to_user.S
csumipv6.S
csumpartial.S
csumpartialcopy.S
csumpartialcopygeneric.S
csumpartialcopyuser.S ARM: Fix csum_partial_copy_from_user() 2010-07-26 12:18:16 +01:00
delay-loop.S ARM: 7452/1: delay: allow timer-based delay implementation to be selected 2012-07-09 17:42:23 +01:00
delay.c ARM: 7653/2: do not scale loops_per_jiffy when using a constant delay clock 2013-02-21 13:25:36 +00:00
div64.S ARM: 7125/1: Add unwinding annotations for 64bit division functions 2011-10-17 09:13:42 +01:00
ecard.S ARM: remove unnecessary mach/hardware.h includes 2011-07-12 11:19:27 -05:00
findbit.S ARM: 6482/2: Fix find_next_zero_bit and related assembly 2010-11-24 20:17:46 +00:00
floppydma.S
getuser.S ARM: 7527/1: uaccess: explicitly check __user pointer when !CPU_USE_DOMAINS 2012-09-09 17:28:47 +01:00
io-acorn.S arch: remove direct definitions of KERN_<LEVEL> uses 2012-07-30 17:25:13 -07:00
io-readsb.S
io-readsl.S
io-readsw-armv3.S ARM: Bring back ARMv3 IO and user access code 2012-08-13 11:44:13 +01:00
io-readsw-armv4.S
io-shark.c
io-writesb.S
io-writesl.S
io-writesw-armv3.S ARM: Bring back ARMv3 IO and user access code 2012-08-13 11:44:13 +01:00
io-writesw-armv4.S
lib1funcs.S ARM: 6945/1: Add unwinding support for division functions 2011-05-27 22:56:53 +01:00
lshrdi3.S
Makefile ARM: Bring back ARMv3 IO and user access code 2012-08-13 11:44:13 +01:00
memchr.S
memcpy.S
memmove.S
memset.S ARM: 7668/1: fix memset-related crashes caused by recent GCC (4.7.2) optimizations 2013-03-07 16:14:22 +00:00
memzero.S
muldi3.S
putuser.S ARM: 7527/1: uaccess: explicitly check __user pointer when !CPU_USE_DOMAINS 2012-09-09 17:28:47 +01:00
setbit.S ARM: 7171/1: unwind: add unwind directives to bitops assembly macros 2011-11-26 21:58:53 +00:00
strchr.S
strrchr.S
testchangebit.S ARM: 7171/1: unwind: add unwind directives to bitops assembly macros 2011-11-26 21:58:53 +00:00
testclearbit.S ARM: 7171/1: unwind: add unwind directives to bitops assembly macros 2011-11-26 21:58:53 +00:00
testsetbit.S ARM: 7171/1: unwind: add unwind directives to bitops assembly macros 2011-11-26 21:58:53 +00:00
uaccess_with_memcpy.c ARM: include linux/highmem.h in uaccess functions 2011-10-02 15:44:32 +02:00
uaccess.S ARM: Bring back ARMv3 IO and user access code 2012-08-13 11:44:13 +01:00
ucmpdi2.S