forked from luck/tmp_suning_uos_patched
2874c5fd28
Based on 1 normalized pattern(s): this program is free software you can redistribute it and or modify it under the terms of the gnu general public license as published by the free software foundation either version 2 of the license or at your option any later version extracted by the scancode license scanner the SPDX license identifier GPL-2.0-or-later has been chosen to replace the boilerplate/reference in 3029 file(s). Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Reviewed-by: Allison Randal <allison@lohutok.net> Cc: linux-spdx@vger.kernel.org Link: https://lkml.kernel.org/r/20190527070032.746973796@linutronix.de Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
103 lines
2.4 KiB
C
103 lines
2.4 KiB
C
// SPDX-License-Identifier: GPL-2.0-or-later
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/*
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* Copyright 2001 MontaVista Software Inc.
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* Author: Jun Sun, jsun@mvista.com or jsun@junsun.net
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* Copyright (c) 2003, 2004 Maciej W. Rozycki
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*
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* Common time service routines for MIPS machines.
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*/
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#include <linux/bug.h>
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#include <linux/clockchips.h>
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#include <linux/types.h>
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#include <linux/kernel.h>
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#include <linux/init.h>
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#include <linux/sched.h>
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#include <linux/param.h>
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#include <linux/time.h>
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#include <linux/timex.h>
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#include <linux/smp.h>
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#include <linux/spinlock.h>
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#include <linux/export.h>
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#include <asm/cpu-features.h>
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#include <asm/cpu-type.h>
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#include <asm/div64.h>
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#include <asm/time.h>
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/*
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* forward reference
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*/
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DEFINE_SPINLOCK(rtc_lock);
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EXPORT_SYMBOL(rtc_lock);
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static int null_perf_irq(void)
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{
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return 0;
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}
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int (*perf_irq)(void) = null_perf_irq;
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EXPORT_SYMBOL(perf_irq);
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/*
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* time_init() - it does the following things.
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*
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* 1) plat_time_init() -
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* a) (optional) set up RTC routines,
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* b) (optional) calibrate and set the mips_hpt_frequency
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* (only needed if you intended to use cpu counter as timer interrupt
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* source)
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* 2) calculate a couple of cached variables for later usage
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*/
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unsigned int mips_hpt_frequency;
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EXPORT_SYMBOL_GPL(mips_hpt_frequency);
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static __init int cpu_has_mfc0_count_bug(void)
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{
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switch (current_cpu_type()) {
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case CPU_R4000PC:
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case CPU_R4000SC:
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case CPU_R4000MC:
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/*
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* V3.0 is documented as suffering from the mfc0 from count bug.
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* Afaik this is the last version of the R4000. Later versions
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* were marketed as R4400.
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*/
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return 1;
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case CPU_R4400PC:
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case CPU_R4400SC:
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case CPU_R4400MC:
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/*
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* The published errata for the R4400 up to 3.0 say the CPU
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* has the mfc0 from count bug.
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*/
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if ((current_cpu_data.processor_id & 0xff) <= 0x30)
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return 1;
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/*
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* we assume newer revisions are ok
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*/
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return 0;
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}
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return 0;
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}
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void __init time_init(void)
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{
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plat_time_init();
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/*
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* The use of the R4k timer as a clock event takes precedence;
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* if reading the Count register might interfere with the timer
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* interrupt, then we don't use the timer as a clock source.
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* We may still use the timer as a clock source though if the
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* timer interrupt isn't reliable; the interference doesn't
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* matter then, because we don't use the interrupt.
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*/
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if (mips_clockevent_init() != 0 || !cpu_has_mfc0_count_bug())
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init_mips_clocksource();
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}
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