kernel_optimize_test/include/soc
Thierry Reding 2a8102dfe0 memory: tegra: Create SMMU display groups
Create SMMU display groups for Tegra30, Tegra114, Tegra124 and Tegra210.
This allows the display controllers on these devices to share the same
IOMMU domain using the standard IOMMU group mechanism.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2017-12-15 10:12:32 +01:00
..
arc ARCv2: IDU-intc: Use build registers for getting numbers of interrupts 2017-02-06 09:37:57 -08:00
at91 clk: at91: utmi: set the mainck rate 2017-11-01 23:39:49 -07:00
bcm2835 staging: vc04_services: fix up rpi firmware functions 2016-10-16 10:26:12 +02:00
brcmstb soc: add stubs for brcmstb SoC's 2015-09-14 15:44:18 -07:00
fsl net/wan/fsl_ucc_hdlc: add hdlc-bus support 2017-05-18 10:28:39 -04:00
imx ARM: imx6: fix static declaration in include/soc/imx/cpuidle.h 2016-06-21 14:35:29 +08:00
mediatek iommu/mediatek: Add mt2712 IOMMU support 2017-08-22 16:37:58 +02:00
nps soc: Support for NPS HW scheduling 2016-11-30 11:54:25 -08:00
rockchip soc: rockchip: add header for ddr rate SIP interface 2016-08-31 18:53:24 +02:00
sa1100 ARM: 8361/1: sa1100: add platform functions to handle PWER settings 2015-05-18 22:00:22 +01:00
tegra memory: tegra: Create SMMU display groups 2017-12-15 10:12:32 +01:00