forked from luck/tmp_suning_uos_patched
609e6025b8
Currently the Negative Terminal Input Routing Configuration is only set when there is a special routing configuration. If we don't use one of the inputs IN1 or IN2 as negative terminal input, the PGA and recording does not work. This patch adds a route from CM1L/CM1R to the PGA as negative input by default. With this configuration the PGA can amplify all input signals and line-in/mic works again. Signed-off-by: Markus Pargmann <mpa@pengutronix.de> Signed-off-by: Mark Brown <broonie@linaro.org>
150 lines
4.3 KiB
C
150 lines
4.3 KiB
C
/*
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* tlv320aic32x4.h
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#ifndef _TLV320AIC32X4_H
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#define _TLV320AIC32X4_H
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/* tlv320aic32x4 register space (in decimal to match datasheet) */
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#define AIC32X4_PAGE1 128
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#define AIC32X4_PSEL 0
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#define AIC32X4_RESET 1
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#define AIC32X4_CLKMUX 4
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#define AIC32X4_PLLPR 5
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#define AIC32X4_PLLJ 6
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#define AIC32X4_PLLDMSB 7
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#define AIC32X4_PLLDLSB 8
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#define AIC32X4_NDAC 11
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#define AIC32X4_MDAC 12
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#define AIC32X4_DOSRMSB 13
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#define AIC32X4_DOSRLSB 14
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#define AIC32X4_NADC 18
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#define AIC32X4_MADC 19
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#define AIC32X4_AOSR 20
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#define AIC32X4_CLKMUX2 25
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#define AIC32X4_CLKOUTM 26
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#define AIC32X4_IFACE1 27
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#define AIC32X4_IFACE2 28
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#define AIC32X4_IFACE3 29
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#define AIC32X4_BCLKN 30
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#define AIC32X4_IFACE4 31
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#define AIC32X4_IFACE5 32
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#define AIC32X4_IFACE6 33
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#define AIC32X4_DOUTCTL 53
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#define AIC32X4_DINCTL 54
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#define AIC32X4_DACSPB 60
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#define AIC32X4_ADCSPB 61
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#define AIC32X4_DACSETUP 63
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#define AIC32X4_DACMUTE 64
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#define AIC32X4_LDACVOL 65
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#define AIC32X4_RDACVOL 66
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#define AIC32X4_ADCSETUP 81
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#define AIC32X4_ADCFGA 82
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#define AIC32X4_LADCVOL 83
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#define AIC32X4_RADCVOL 84
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#define AIC32X4_LAGC1 86
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#define AIC32X4_LAGC2 87
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#define AIC32X4_LAGC3 88
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#define AIC32X4_LAGC4 89
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#define AIC32X4_LAGC5 90
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#define AIC32X4_LAGC6 91
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#define AIC32X4_LAGC7 92
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#define AIC32X4_RAGC1 94
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#define AIC32X4_RAGC2 95
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#define AIC32X4_RAGC3 96
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#define AIC32X4_RAGC4 97
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#define AIC32X4_RAGC5 98
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#define AIC32X4_RAGC6 99
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#define AIC32X4_RAGC7 100
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#define AIC32X4_PWRCFG (AIC32X4_PAGE1 + 1)
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#define AIC32X4_LDOCTL (AIC32X4_PAGE1 + 2)
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#define AIC32X4_OUTPWRCTL (AIC32X4_PAGE1 + 9)
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#define AIC32X4_CMMODE (AIC32X4_PAGE1 + 10)
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#define AIC32X4_HPLROUTE (AIC32X4_PAGE1 + 12)
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#define AIC32X4_HPRROUTE (AIC32X4_PAGE1 + 13)
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#define AIC32X4_LOLROUTE (AIC32X4_PAGE1 + 14)
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#define AIC32X4_LORROUTE (AIC32X4_PAGE1 + 15)
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#define AIC32X4_HPLGAIN (AIC32X4_PAGE1 + 16)
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#define AIC32X4_HPRGAIN (AIC32X4_PAGE1 + 17)
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#define AIC32X4_LOLGAIN (AIC32X4_PAGE1 + 18)
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#define AIC32X4_LORGAIN (AIC32X4_PAGE1 + 19)
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#define AIC32X4_HEADSTART (AIC32X4_PAGE1 + 20)
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#define AIC32X4_MICBIAS (AIC32X4_PAGE1 + 51)
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#define AIC32X4_LMICPGAPIN (AIC32X4_PAGE1 + 52)
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#define AIC32X4_LMICPGANIN (AIC32X4_PAGE1 + 54)
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#define AIC32X4_RMICPGAPIN (AIC32X4_PAGE1 + 55)
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#define AIC32X4_RMICPGANIN (AIC32X4_PAGE1 + 57)
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#define AIC32X4_FLOATINGINPUT (AIC32X4_PAGE1 + 58)
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#define AIC32X4_LMICPGAVOL (AIC32X4_PAGE1 + 59)
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#define AIC32X4_RMICPGAVOL (AIC32X4_PAGE1 + 60)
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#define AIC32X4_FREQ_12000000 12000000
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#define AIC32X4_FREQ_24000000 24000000
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#define AIC32X4_FREQ_25000000 25000000
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#define AIC32X4_WORD_LEN_16BITS 0x00
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#define AIC32X4_WORD_LEN_20BITS 0x01
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#define AIC32X4_WORD_LEN_24BITS 0x02
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#define AIC32X4_WORD_LEN_32BITS 0x03
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#define AIC32X4_LADC_EN (1 << 7)
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#define AIC32X4_RADC_EN (1 << 6)
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#define AIC32X4_I2S_MODE 0x00
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#define AIC32X4_DSP_MODE 0x01
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#define AIC32X4_RIGHT_JUSTIFIED_MODE 0x02
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#define AIC32X4_LEFT_JUSTIFIED_MODE 0x03
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#define AIC32X4_AVDDWEAKDISABLE 0x08
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#define AIC32X4_LDOCTLEN 0x01
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#define AIC32X4_LDOIN_18_36 0x01
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#define AIC32X4_LDOIN2HP 0x02
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#define AIC32X4_DACSPBLOCK_MASK 0x1f
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#define AIC32X4_ADCSPBLOCK_MASK 0x1f
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#define AIC32X4_PLLJ_SHIFT 6
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#define AIC32X4_DOSRMSB_SHIFT 4
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#define AIC32X4_PLLCLKIN 0x03
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#define AIC32X4_MICBIAS_LDOIN 0x08
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#define AIC32X4_MICBIAS_2075V 0x60
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#define AIC32X4_LMICPGANIN_IN2R_10K 0x10
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#define AIC32X4_LMICPGANIN_CM1L_10K 0x40
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#define AIC32X4_RMICPGANIN_IN1L_10K 0x10
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#define AIC32X4_RMICPGANIN_CM1R_10K 0x40
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#define AIC32X4_LMICPGAVOL_NOGAIN 0x80
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#define AIC32X4_RMICPGAVOL_NOGAIN 0x80
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#define AIC32X4_BCLKMASTER 0x08
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#define AIC32X4_WCLKMASTER 0x04
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#define AIC32X4_PLLEN (0x01 << 7)
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#define AIC32X4_NDACEN (0x01 << 7)
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#define AIC32X4_MDACEN (0x01 << 7)
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#define AIC32X4_NADCEN (0x01 << 7)
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#define AIC32X4_MADCEN (0x01 << 7)
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#define AIC32X4_BCLKEN (0x01 << 7)
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#define AIC32X4_DACEN (0x03 << 6)
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#define AIC32X4_RDAC2LCHN (0x02 << 2)
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#define AIC32X4_LDAC2RCHN (0x02 << 4)
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#define AIC32X4_LDAC2LCHN (0x01 << 4)
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#define AIC32X4_RDAC2RCHN (0x01 << 2)
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#define AIC32X4_DAC_CHAN_MASK 0x3c
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#define AIC32X4_SSTEP2WCLK 0x01
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#define AIC32X4_MUTEON 0x0C
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#define AIC32X4_DACMOD2BCLK 0x01
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#endif /* _TLV320AIC32X4_H */
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