kernel_optimize_test/drivers/clk
Codrin Ciubotariu 6bf98b94ff clk: at91: clk-generated: Limit the requested rate to our range
[ Upstream commit af7651e67b9d5f7e63ea23b118e3672ac662244a ]

On clk_generated_determine_rate(), the requested rate could be outside
of clk's range. Limit the rate to the clock's range to not return an
error.

Fixes: df70aeef60 ("clk: at91: add generated clock driver")
Signed-off-by: Codrin Ciubotariu <codrin.ciubotariu@microchip.com>
Link: https://lore.kernel.org/r/20210707131213.3283509-1-codrin.ciubotariu@microchip.com
Acked-by: Nicolas Ferre <nicolas.ferre@microchip.com>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
Signed-off-by: Sasha Levin <sashal@kernel.org>
2021-09-18 13:40:16 +02:00
..
actions clk: actions: Fix AHPPREDIV-H-AHB clock chain on Owl S500 SoC 2021-07-14 16:56:31 +02:00
analogbits
at91 clk: at91: clk-generated: Limit the requested rate to our range 2021-09-18 13:40:16 +02:00
axis
axs10x clk: axs10x: use devm_platform_ioremap_resource() to simplify code 2019-10-16 16:17:50 -07:00
baikal-t1 clk: baikal-t1: Mark Ethernet PLL as critical 2020-10-13 19:48:34 -07:00
bcm clk: bcm: dvp: Add MODULE_DEVICE_TABLE() 2020-12-30 11:54:00 +01:00
berlin
davinci This pull request contains zero diff to the core framework. It is a collection 2020-10-22 12:53:28 -07:00
h8300
hisilicon Merge branches 'clk-hisi', 'clk-amlogic', 'clk-samsung', 'clk-renesas' and 'clk-imx' into clk-next 2019-11-27 08:14:17 -08:00
imgtec treewide: replace '---help---' in Kconfig files with 'help' 2020-06-14 01:57:21 +09:00
imx clk: imx8m: fix clock tree update of TF-A managed clocks 2021-09-18 13:40:15 +02:00
ingenic clk: ingenic: Fix divider calculation with div tables 2020-12-30 11:54:25 +01:00
keystone clk: keystone: sci-clk: add 10% slack to set_rate 2020-09-22 12:58:52 -07:00
loongson1
mediatek Merge branches 'clk-simplify', 'clk-ti', 'clk-tegra', 'clk-rockchip' and 'clk-mediatek' into clk-next 2020-10-20 11:46:47 -07:00
meson clk: meson: g12a: fix gp0 and hifi ranges 2021-07-14 16:56:16 +02:00
microchip clk: let init callback return an error code 2019-12-23 18:53:13 -08:00
mmp clk: mmp2: fix build without CONFIG_PM 2021-02-03 23:28:44 +01:00
mvebu clk: kirkwood: Fix a clocking boot regression 2021-09-15 09:50:48 +02:00
mxs
nxp
pistachio
pxa clk: pxa: Constify static struct clk_ops 2020-10-13 19:49:11 -07:00
qcom clk: qcom: gdsc: Ensure regulator init state matches GDSC state 2021-08-26 08:35:54 -04:00
renesas clk: renesas: rcar-usb2-clock-sel: Fix kernel NULL pointer dereference 2021-09-03 10:09:26 +02:00
rockchip clk: rockchip: drop GRF dependency for rk3328/rk3036 pll types 2021-09-18 13:40:11 +02:00
samsung clk: exynos7: Mark aclk_fsys1_200 as critical 2021-05-19 10:13:19 +02:00
sifive clk: sifive: allocate sufficient memory for struct __prci_data 2020-06-25 15:04:13 -07:00
sirf clk: clk-prima2: fix return value check in prima2_clk_init() 2020-10-13 19:54:30 -07:00
socfpga clk: socfpga: agilex: add the bypass register for s2f_usr0 clock 2021-09-18 13:40:07 +02:00
spear clk: spear: Remove uninitialized_var() usage 2020-07-16 12:32:26 -07:00
sprd This time around we have 4 lines of diff in the core framework, removing a 2020-06-10 11:42:19 -07:00
st clk: st: Remove uninitialized_var() usage 2020-07-16 12:32:25 -07:00
sunxi clk: sunxi: Fix incorrect usage of round_down() 2020-04-14 09:21:05 +02:00
sunxi-ng clk: sunxi-ng: h6: Fix clock divider range on some clocks 2021-03-04 11:37:58 +01:00
tegra clk: tegra: Implement disable_unused() of tegra_clk_sdmmc_mux_ops 2021-08-12 13:22:04 +02:00
ti clk: ti: Fix memleak in ti_fapll_synth_setup 2020-12-30 11:53:58 +01:00
uniphier clk: uniphier: Fix potential infinite loop 2021-05-14 09:50:26 +02:00
ux500 clk: ux500: Fix up the SGA clock for some variants 2020-01-04 23:27:15 -08:00
versatile clk: versatile: Add of_node_put() before return statement 2020-09-10 00:57:42 -07:00
x86 More ACPI updates for 5.9-rc1 2020-08-15 08:18:22 -07:00
zte
zynq
zynqmp clk: zynqmp: pll: add set_pll_mode to check condition in zynqmp_pll_enable 2021-05-14 09:50:26 +02:00
clk-asm9260.c clk: asm9260: fix __clk_hw_register_fixed_rate_with_accuracy typo 2020-04-13 12:20:06 -07:00
clk-aspeed.c clk: aspeed: Add RMII RCLK gates for both AST2500 MACs 2019-11-26 10:02:48 -08:00
clk-aspeed.h
clk-ast2600.c media: aspeed: fix clock handling logic 2021-05-14 09:50:23 +02:00
clk-axi-clkgen.c clk: axi-clkgen: Set power bits for fractional mode 2020-10-13 19:44:40 -07:00
clk-axm5516.c
clk-bd718x7.c clk: bd718x7: Support ROHM BD71828 clk block 2020-01-24 07:22:47 +00:00
clk-bm1880.c clk: bm1800: Remove set but not used variable 'fref' 2019-12-24 00:10:33 -08:00
clk-bulk.c
clk-cdce706.c Replace HTTP links with HTTPS ones: Common CLK framework 2020-07-10 17:15:34 -07:00
clk-cdce925.c
clk-clps711x.c
clk-composite.c clk: composite: Export clk_hw_register_composite() 2020-08-22 12:38:06 +08:00
clk-conf.c
clk-cs2000-cp.c
clk-devres.c clk: fix leak on devm_clk_bulk_get_all() unwind 2021-08-12 13:22:11 +02:00
clk-divider.c clk: divider: fix initialization with parent_hw 2021-03-04 11:38:06 +01:00
clk-efm32gg.c
clk-fixed-factor.c clk: fixed: add missing kerneldoc 2020-09-22 12:44:14 -07:00
clk-fixed-mmio.c
clk-fixed-rate.c clk: fixed: add missing kerneldoc 2020-09-22 12:44:14 -07:00
clk-fractional-divider.c
clk-fsl-sai.c clk: fsl-sai: fix memory leak 2020-12-30 11:53:42 +01:00
clk-gate.c treewide: Remove uninitialized_var() usage 2020-07-16 12:35:15 -07:00
clk-gemini.c
clk-gpio.c Replace HTTP links with HTTPS ones: Common CLK framework 2020-07-10 17:15:34 -07:00
clk-hi655x.c
clk-highbank.c
clk-hsdk-pll.c CLK: HSDK: CGU: add support for 148.5MHz clock 2020-05-28 21:06:39 -07:00
clk-lochnagar.c
clk-max9485.c
clk-max77686.c
clk-milbeaut.c
clk-moxart.c
clk-multiplier.c
clk-mux.c clk: mux: Add support for specifying parents via DT/pointers 2020-01-06 23:10:05 -08:00
clk-nomadik.c
clk-npcm7xx.c
clk-nspire.c
clk-oxnas.c
clk-palmas.c
clk-plldig.c clk: ls1028a: fix a dereference of pointer 'parent' before a null check 2020-02-03 23:03:49 -08:00
clk-pwm.c clk: pwm: Use 64-bit division function 2020-06-17 20:42:10 +02:00
clk-qoriq.c clk: qoriq: modify MAX_PLL_DIV to 32 2020-10-13 19:48:09 -07:00
clk-rk808.c
clk-s2mps11.c clk: s2mps11: Fix a resource leak in error handling paths in the probe function 2020-12-30 11:54:01 +01:00
clk-scmi.c clk: scmi: Fix min and max rate when registering clocks with discrete rates 2020-07-13 09:40:21 +01:00
clk-scpi.c
clk-si514.c
clk-si544.c
clk-si570.c
clk-si5341.c clk: si5341: Update initialization magic 2021-07-14 16:56:31 +02:00
clk-si5351.c Replace HTTP links with HTTPS ones: Common CLK framework 2020-07-10 17:15:34 -07:00
clk-si5351.h
clk-sparx5.c clk: sparx5: Add Sparx5 SoC DPLL clock driver 2020-07-28 18:17:56 -07:00
clk-stm32f4.c clk: stm32f4: fix post divisor setup for I2S/SAI PLLs 2021-08-12 13:22:03 +02:00
clk-stm32h7.c
clk-stm32mp1.c
clk-tango4.c
clk-twl6040.c
clk-u300.c
clk-versaclock5.c clk: vc5: fix output disabling when enabling a FOD 2021-07-14 16:56:19 +02:00
clk-vt8500.c
clk-wm831x.c
clk-xgene.c
clk.c clk: fix invalid usage of list cursor in unregister 2021-04-14 08:42:10 +02:00
clk.h
clkdev.c
Kconfig Merge branches 'clk-ingenic', 'clk-at91', 'clk-kconfig', 'clk-imx', 'clk-qcom', 'clk-prima2' and 'clk-bcm' into clk-next 2020-10-20 11:47:07 -07:00
Makefile clk: sparx5: Add Sparx5 SoC DPLL clock driver 2020-07-28 18:17:56 -07:00