kernel_optimize_test/arch/arm/mm
Nitin Gupta 787b2faadc ARM: force dcache flush if dcache_dirty bit set
On ARM, update_mmu_cache() does dcache flush for a page only if
it has a kernel mapping (page_mapping(page) != NULL). The correct
behavior would be to force the flush based on dcache_dirty bit only.

One of the cases where present logic would be a problem is when
a RAM based block device[1] is used as a swap disk. In this case,
we would have in-memory data corruption as shown in steps below:

do_swap_page()
{
    - Allocate a new page (if not already in swap cache)
    - Issue read from swap disk
        - Block driver issues flush_dcache_page()
        - flush_dcache_page() simply sets PG_dcache_dirty bit and does not
          actually issue a flush since this page has no user space mapping yet.
    - Now, if swap disk is almost full, this newly read page is removed
      from swap cache and corrsponding swap slot is freed.
    - Map this page anonymously in user space.
    - update_mmu_cache()
        - Since this page does not have kernel mapping (its not in page/swap
          cache and is mapped anonymously), it does not issue dcache flush
          even if dcache_dirty bit is set by flush_dcache_page() above.

    <user now gets stale data since dcache was never flushed>
}

Same problem exists on mips too.

[1] example:
 - brd (RAM based block device)
 - ramzswap (RAM based compressed swap device)

Signed-off-by: Nitin Gupta <ngupta@vflare.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2009-10-12 17:52:26 +01:00
..
abort-ev4.S
abort-ev4t.S
abort-ev5t.S
abort-ev5tj.S
abort-ev6.S
abort-ev7.S
abort-lv4t.S
abort-macro.S
abort-nommu.S
alignment.c
cache-fa.S
cache-feroceon-l2.c
cache-l2x0.c
cache-v3.S
cache-v4.S
cache-v4wb.S
cache-v4wt.S
cache-v6.S ARM: 5746/1: Handle possible translation errors in ARMv6/v7 coherent_user_range 2009-10-07 13:12:59 +01:00
cache-v7.S ARM: 5746/1: Handle possible translation errors in ARMv6/v7 coherent_user_range 2009-10-07 13:12:59 +01:00
cache-xsc3l2.c
context.c cpumask: use mm_cpumask() wrapper: arm 2009-09-24 09:34:49 +09:30
copypage-fa.c
copypage-feroceon.c
copypage-v3.c
copypage-v4mc.c
copypage-v4wb.c
copypage-v4wt.c
copypage-v6.c
copypage-xsc3.c
copypage-xscale.c
discontig.c
dma-mapping.c
extable.c
fault-armv.c ARM: force dcache flush if dcache_dirty bit set 2009-10-12 17:52:26 +01:00
fault.c ARM: 5742/1: ARM: add debug check for invalid kernel page faults 2009-10-05 17:55:55 +01:00
fault.h
flush.c cpumask: use mm_cpumask() wrapper: arm 2009-09-24 09:34:49 +09:30
highmem.c ARM: Add kmap_atomic type debugging 2009-10-11 16:29:48 +01:00
init.c ARM: 5747/1: Fix the start_pg value in free_memmap() 2009-10-07 13:13:00 +01:00
iomap.c
ioremap.c
Kconfig ARM: 5727/1: Pass IFSR register to do_PrefetchAbort() 2009-10-02 22:34:32 +01:00
Makefile ARM: 5727/1: Pass IFSR register to do_PrefetchAbort() 2009-10-02 22:34:32 +01:00
mm.h
mmap.c ARM: 5740/1: fix valid_phys_addr_range() range check 2009-10-02 22:32:34 +01:00
mmu.c ARM: Don't allow highmem on SMP platforms without h/w TLB ops broadcast 2009-09-28 18:06:20 +01:00
nommu.c
pabort-legacy.S ARM: 5727/1: Pass IFSR register to do_PrefetchAbort() 2009-10-02 22:34:32 +01:00
pabort-v6.S ARM: 5727/1: Pass IFSR register to do_PrefetchAbort() 2009-10-02 22:34:32 +01:00
pabort-v7.S ARM: 5727/1: Pass IFSR register to do_PrefetchAbort() 2009-10-02 22:34:32 +01:00
pgd.c
proc-arm6_7.S ARM: 5727/1: Pass IFSR register to do_PrefetchAbort() 2009-10-02 22:34:32 +01:00
proc-arm7tdmi.S ARM: 5727/1: Pass IFSR register to do_PrefetchAbort() 2009-10-02 22:34:32 +01:00
proc-arm9tdmi.S ARM: 5727/1: Pass IFSR register to do_PrefetchAbort() 2009-10-02 22:34:32 +01:00
proc-arm720.S ARM: 5727/1: Pass IFSR register to do_PrefetchAbort() 2009-10-02 22:34:32 +01:00
proc-arm740.S ARM: 5727/1: Pass IFSR register to do_PrefetchAbort() 2009-10-02 22:34:32 +01:00
proc-arm920.S ARM: 5727/1: Pass IFSR register to do_PrefetchAbort() 2009-10-02 22:34:32 +01:00
proc-arm922.S ARM: 5727/1: Pass IFSR register to do_PrefetchAbort() 2009-10-02 22:34:32 +01:00
proc-arm925.S ARM: 5727/1: Pass IFSR register to do_PrefetchAbort() 2009-10-02 22:34:32 +01:00
proc-arm926.S ARM: 5727/1: Pass IFSR register to do_PrefetchAbort() 2009-10-02 22:34:32 +01:00
proc-arm940.S ARM: 5727/1: Pass IFSR register to do_PrefetchAbort() 2009-10-02 22:34:32 +01:00
proc-arm946.S ARM: 5727/1: Pass IFSR register to do_PrefetchAbort() 2009-10-02 22:34:32 +01:00
proc-arm1020.S ARM: 5727/1: Pass IFSR register to do_PrefetchAbort() 2009-10-02 22:34:32 +01:00
proc-arm1020e.S ARM: 5727/1: Pass IFSR register to do_PrefetchAbort() 2009-10-02 22:34:32 +01:00
proc-arm1022.S ARM: 5727/1: Pass IFSR register to do_PrefetchAbort() 2009-10-02 22:34:32 +01:00
proc-arm1026.S ARM: 5727/1: Pass IFSR register to do_PrefetchAbort() 2009-10-02 22:34:32 +01:00
proc-fa526.S ARM: 5727/1: Pass IFSR register to do_PrefetchAbort() 2009-10-02 22:34:32 +01:00
proc-feroceon.S ARM: 5727/1: Pass IFSR register to do_PrefetchAbort() 2009-10-02 22:34:32 +01:00
proc-macros.S Merge branch 'devel-stable' into devel 2009-09-12 12:02:26 +01:00
proc-mohawk.S ARM: 5727/1: Pass IFSR register to do_PrefetchAbort() 2009-10-02 22:34:32 +01:00
proc-sa110.S ARM: 5727/1: Pass IFSR register to do_PrefetchAbort() 2009-10-02 22:34:32 +01:00
proc-sa1100.S ARM: 5727/1: Pass IFSR register to do_PrefetchAbort() 2009-10-02 22:34:32 +01:00
proc-syms.c
proc-v6.S ARM: 5727/1: Pass IFSR register to do_PrefetchAbort() 2009-10-02 22:34:32 +01:00
proc-v7.S ARM: 5727/1: Pass IFSR register to do_PrefetchAbort() 2009-10-02 22:34:32 +01:00
proc-xsc3.S ARM: 5727/1: Pass IFSR register to do_PrefetchAbort() 2009-10-02 22:34:32 +01:00
proc-xscale.S ARM: 5727/1: Pass IFSR register to do_PrefetchAbort() 2009-10-02 22:34:32 +01:00
tlb-fa.S
tlb-v3.S
tlb-v4.S
tlb-v4wb.S
tlb-v4wbi.S
tlb-v6.S
tlb-v7.S