forked from luck/tmp_suning_uos_patched
b4559ace2c
Changeset 9e8da9e8 added a parameter to specify the frequency divisor, used by the driver. However, not all places are passing this parameter. So, preserve the previous default, to avoid breaking the existing drivers. Signed-off-by: Mauro Carvalho Chehab <m.chehab@samsung.com>
379 lines
8.5 KiB
C
379 lines
8.5 KiB
C
/*
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Montage Technology TS2020 - Silicon Tuner driver
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Copyright (C) 2009-2012 Konstantin Dimitrov <kosio.dimitrov@gmail.com>
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Copyright (C) 2009-2012 TurboSight.com
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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 2 of the License, or
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(at your option) any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program; if not, write to the Free Software
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Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
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*/
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#include "dvb_frontend.h"
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#include "ts2020.h"
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#define TS2020_XTAL_FREQ 27000 /* in kHz */
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#define FREQ_OFFSET_LOW_SYM_RATE 3000
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struct ts2020_priv {
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/* i2c details */
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int i2c_address;
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struct i2c_adapter *i2c;
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u8 clk_out_div;
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u32 frequency;
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u32 frequency_div;
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};
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static int ts2020_release(struct dvb_frontend *fe)
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{
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kfree(fe->tuner_priv);
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fe->tuner_priv = NULL;
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return 0;
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}
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static int ts2020_writereg(struct dvb_frontend *fe, int reg, int data)
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{
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struct ts2020_priv *priv = fe->tuner_priv;
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u8 buf[] = { reg, data };
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struct i2c_msg msg[] = {
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{
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.addr = priv->i2c_address,
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.flags = 0,
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.buf = buf,
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.len = 2
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}
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};
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int err;
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if (fe->ops.i2c_gate_ctrl)
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fe->ops.i2c_gate_ctrl(fe, 1);
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err = i2c_transfer(priv->i2c, msg, 1);
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if (err != 1) {
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printk(KERN_ERR
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"%s: writereg error(err == %i, reg == 0x%02x, value == 0x%02x)\n",
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__func__, err, reg, data);
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return -EREMOTEIO;
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}
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if (fe->ops.i2c_gate_ctrl)
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fe->ops.i2c_gate_ctrl(fe, 0);
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return 0;
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}
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static int ts2020_readreg(struct dvb_frontend *fe, u8 reg)
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{
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struct ts2020_priv *priv = fe->tuner_priv;
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int ret;
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u8 b0[] = { reg };
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u8 b1[] = { 0 };
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struct i2c_msg msg[] = {
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{
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.addr = priv->i2c_address,
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.flags = 0,
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.buf = b0,
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.len = 1
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}, {
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.addr = priv->i2c_address,
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.flags = I2C_M_RD,
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.buf = b1,
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.len = 1
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}
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};
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if (fe->ops.i2c_gate_ctrl)
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fe->ops.i2c_gate_ctrl(fe, 1);
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ret = i2c_transfer(priv->i2c, msg, 2);
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if (ret != 2) {
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printk(KERN_ERR "%s: reg=0x%x(error=%d)\n",
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__func__, reg, ret);
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return ret;
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}
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if (fe->ops.i2c_gate_ctrl)
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fe->ops.i2c_gate_ctrl(fe, 0);
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return b1[0];
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}
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static int ts2020_sleep(struct dvb_frontend *fe)
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{
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struct ts2020_priv *priv = fe->tuner_priv;
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int ret;
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u8 buf[] = { 10, 0 };
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struct i2c_msg msg = {
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.addr = priv->i2c_address,
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.flags = 0,
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.buf = buf,
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.len = 2
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};
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if (fe->ops.i2c_gate_ctrl)
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fe->ops.i2c_gate_ctrl(fe, 1);
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ret = i2c_transfer(priv->i2c, &msg, 1);
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if (ret != 1)
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printk(KERN_ERR "%s: i2c error\n", __func__);
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if (fe->ops.i2c_gate_ctrl)
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fe->ops.i2c_gate_ctrl(fe, 0);
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return (ret == 1) ? 0 : ret;
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}
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static int ts2020_init(struct dvb_frontend *fe)
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{
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struct ts2020_priv *priv = fe->tuner_priv;
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ts2020_writereg(fe, 0x42, 0x73);
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ts2020_writereg(fe, 0x05, priv->clk_out_div);
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ts2020_writereg(fe, 0x20, 0x27);
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ts2020_writereg(fe, 0x07, 0x02);
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ts2020_writereg(fe, 0x11, 0xff);
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ts2020_writereg(fe, 0x60, 0xf9);
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ts2020_writereg(fe, 0x08, 0x01);
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ts2020_writereg(fe, 0x00, 0x41);
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return 0;
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}
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static int ts2020_tuner_gate_ctrl(struct dvb_frontend *fe, u8 offset)
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{
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int ret;
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ret = ts2020_writereg(fe, 0x51, 0x1f - offset);
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ret |= ts2020_writereg(fe, 0x51, 0x1f);
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ret |= ts2020_writereg(fe, 0x50, offset);
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ret |= ts2020_writereg(fe, 0x50, 0x00);
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msleep(20);
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return ret;
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}
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static int ts2020_set_tuner_rf(struct dvb_frontend *fe)
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{
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int reg;
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reg = ts2020_readreg(fe, 0x3d);
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reg &= 0x7f;
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if (reg < 0x16)
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reg = 0xa1;
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else if (reg == 0x16)
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reg = 0x99;
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else
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reg = 0xf9;
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ts2020_writereg(fe, 0x60, reg);
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reg = ts2020_tuner_gate_ctrl(fe, 0x08);
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return reg;
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}
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static int ts2020_set_params(struct dvb_frontend *fe)
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{
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struct dtv_frontend_properties *c = &fe->dtv_property_cache;
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struct ts2020_priv *priv = fe->tuner_priv;
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int ret;
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u32 frequency = c->frequency;
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s32 offset_khz;
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u32 symbol_rate = (c->symbol_rate / 1000);
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u32 f3db, gdiv28;
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u16 value, ndiv, lpf_coeff;
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u8 lpf_mxdiv, mlpf_max, mlpf_min, nlpf;
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u8 lo = 0x01, div4 = 0x0;
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/* Calculate frequency divider */
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if (frequency < priv->frequency_div) {
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lo |= 0x10;
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div4 = 0x1;
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ndiv = (frequency * 14 * 4) / TS2020_XTAL_FREQ;
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} else
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ndiv = (frequency * 14 * 2) / TS2020_XTAL_FREQ;
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ndiv = ndiv + ndiv % 2;
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ndiv = ndiv - 1024;
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ret = ts2020_writereg(fe, 0x10, 0x80 | lo);
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/* Set frequency divider */
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ret |= ts2020_writereg(fe, 0x01, (ndiv >> 8) & 0xf);
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ret |= ts2020_writereg(fe, 0x02, ndiv & 0xff);
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ret |= ts2020_writereg(fe, 0x03, 0x06);
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ret |= ts2020_tuner_gate_ctrl(fe, 0x10);
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if (ret < 0)
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return -ENODEV;
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/* Tuner Frequency Range */
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ret = ts2020_writereg(fe, 0x10, lo);
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ret |= ts2020_tuner_gate_ctrl(fe, 0x08);
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/* Tuner RF */
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ret |= ts2020_set_tuner_rf(fe);
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gdiv28 = (TS2020_XTAL_FREQ / 1000 * 1694 + 500) / 1000;
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ret |= ts2020_writereg(fe, 0x04, gdiv28 & 0xff);
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ret |= ts2020_tuner_gate_ctrl(fe, 0x04);
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if (ret < 0)
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return -ENODEV;
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value = ts2020_readreg(fe, 0x26);
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f3db = (symbol_rate * 135) / 200 + 2000;
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f3db += FREQ_OFFSET_LOW_SYM_RATE;
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if (f3db < 7000)
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f3db = 7000;
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if (f3db > 40000)
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f3db = 40000;
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gdiv28 = gdiv28 * 207 / (value * 2 + 151);
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mlpf_max = gdiv28 * 135 / 100;
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mlpf_min = gdiv28 * 78 / 100;
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if (mlpf_max > 63)
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mlpf_max = 63;
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lpf_coeff = 2766;
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nlpf = (f3db * gdiv28 * 2 / lpf_coeff /
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(TS2020_XTAL_FREQ / 1000) + 1) / 2;
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if (nlpf > 23)
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nlpf = 23;
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if (nlpf < 1)
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nlpf = 1;
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lpf_mxdiv = (nlpf * (TS2020_XTAL_FREQ / 1000)
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* lpf_coeff * 2 / f3db + 1) / 2;
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if (lpf_mxdiv < mlpf_min) {
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nlpf++;
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lpf_mxdiv = (nlpf * (TS2020_XTAL_FREQ / 1000)
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* lpf_coeff * 2 / f3db + 1) / 2;
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}
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if (lpf_mxdiv > mlpf_max)
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lpf_mxdiv = mlpf_max;
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ret = ts2020_writereg(fe, 0x04, lpf_mxdiv);
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ret |= ts2020_writereg(fe, 0x06, nlpf);
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ret |= ts2020_tuner_gate_ctrl(fe, 0x04);
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ret |= ts2020_tuner_gate_ctrl(fe, 0x01);
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msleep(80);
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/* calculate offset assuming 96000kHz*/
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offset_khz = (ndiv - ndiv % 2 + 1024) * TS2020_XTAL_FREQ
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/ (6 + 8) / (div4 + 1) / 2;
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priv->frequency = offset_khz;
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return (ret < 0) ? -EINVAL : 0;
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}
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static int ts2020_get_frequency(struct dvb_frontend *fe, u32 *frequency)
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{
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struct ts2020_priv *priv = fe->tuner_priv;
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*frequency = priv->frequency;
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return 0;
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}
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/* read TS2020 signal strength */
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static int ts2020_read_signal_strength(struct dvb_frontend *fe,
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u16 *signal_strength)
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{
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u16 sig_reading, sig_strength;
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u8 rfgain, bbgain;
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rfgain = ts2020_readreg(fe, 0x3d) & 0x1f;
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bbgain = ts2020_readreg(fe, 0x21) & 0x1f;
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if (rfgain > 15)
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rfgain = 15;
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if (bbgain > 13)
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bbgain = 13;
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sig_reading = rfgain * 2 + bbgain * 3;
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sig_strength = 40 + (64 - sig_reading) * 50 / 64 ;
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/* cook the value to be suitable for szap-s2 human readable output */
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*signal_strength = sig_strength * 1000;
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return 0;
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}
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static struct dvb_tuner_ops ts2020_tuner_ops = {
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.info = {
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.name = "TS2020",
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.frequency_min = 950000,
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.frequency_max = 2150000
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},
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.init = ts2020_init,
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.release = ts2020_release,
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.sleep = ts2020_sleep,
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.set_params = ts2020_set_params,
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.get_frequency = ts2020_get_frequency,
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.get_rf_strength = ts2020_read_signal_strength,
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};
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struct dvb_frontend *ts2020_attach(struct dvb_frontend *fe,
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const struct ts2020_config *config,
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struct i2c_adapter *i2c)
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{
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struct ts2020_priv *priv = NULL;
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u8 buf;
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priv = kzalloc(sizeof(struct ts2020_priv), GFP_KERNEL);
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if (priv == NULL)
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return NULL;
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priv->i2c_address = config->tuner_address;
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priv->i2c = i2c;
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priv->clk_out_div = config->clk_out_div;
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priv->frequency_div = config->frequency_div;
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fe->tuner_priv = priv;
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if (!priv->frequency_div)
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priv->frequency_div = 1060000;
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/* Wake Up the tuner */
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if ((0x03 & ts2020_readreg(fe, 0x00)) == 0x00) {
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ts2020_writereg(fe, 0x00, 0x01);
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msleep(2);
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}
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ts2020_writereg(fe, 0x00, 0x03);
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msleep(2);
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/* Check the tuner version */
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buf = ts2020_readreg(fe, 0x00);
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if ((buf == 0x01) || (buf == 0x41) || (buf == 0x81))
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printk(KERN_INFO "%s: Find tuner TS2020!\n", __func__);
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else {
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printk(KERN_ERR "%s: Read tuner reg[0] = %d\n", __func__, buf);
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kfree(priv);
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return NULL;
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}
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memcpy(&fe->ops.tuner_ops, &ts2020_tuner_ops,
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sizeof(struct dvb_tuner_ops));
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return fe;
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}
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EXPORT_SYMBOL(ts2020_attach);
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MODULE_AUTHOR("Konstantin Dimitrov <kosio.dimitrov@gmail.com>");
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MODULE_DESCRIPTION("Montage Technology TS2020 - Silicon tuner driver module");
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MODULE_LICENSE("GPL");
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