Stephen Boyd 30cbb0c01b ARM: qcom: scm: Get cacheline size from CTR ... Instead of hardcoding the cacheline size as 32, get the cacheline size from the CTR register. Signed-off-by: Stephen Boyd <sboyd@codeaurora.org> Signed-off-by: Kumar Gala <galak@codeaurora.org>		2015-01-19 11:53:31 -06:00
..
board.c	ARM: qcom: Add initial IPQ8064 SoC and AP148 device trees	2014-08-21 11:43:34 -05:00
Kconfig	ARM: qcom: Select ARCH_SUPPORTS_BIG_ENDIAN	2015-01-19 11:53:30 -06:00
Makefile
platsmp.c	ARM: qcom: Add SMP support for KPSSv2	2014-02-11 15:00:40 -06:00
scm-boot.c
scm-boot.h	ARM: qcom: Add SMP support for KPSSv1	2014-02-11 15:00:39 -06:00
scm.c	ARM: qcom: scm: Get cacheline size from CTR	2015-01-19 11:53:31 -06:00
scm.h