forked from luck/tmp_suning_uos_patched
f516fb704d
Clean-up incorrect indentation, extra spaces, long lines, and missing EOF newline in schema files. Most of the clean-ups are for list indentation which should always be 2 spaces more than the preceding keyword. Found with yamllint (which I plan to integrate into the checks). Cc: linux-arm-kernel@lists.infradead.org Cc: linux-clk@vger.kernel.org Cc: dri-devel@lists.freedesktop.org Cc: linux-spi@vger.kernel.org Cc: linux-gpio@vger.kernel.org Cc: linux-remoteproc@vger.kernel.org Cc: linux-hwmon@vger.kernel.org Cc: linux-i2c@vger.kernel.org Cc: linux-fbdev@vger.kernel.org Cc: linux-iio@vger.kernel.org Cc: linux-input@vger.kernel.org Cc: linux-pm@vger.kernel.org Cc: linux-media@vger.kernel.org Cc: alsa-devel@alsa-project.org Cc: linux-mmc@vger.kernel.org Cc: linux-mtd@lists.infradead.org Cc: netdev@vger.kernel.org Cc: linux-rtc@vger.kernel.org Cc: linux-serial@vger.kernel.org Cc: linux-usb@vger.kernel.org Acked-by: Sam Ravnborg <sam@ravnborg.org> Signed-off-by: Rob Herring <robh@kernel.org>
78 lines
1.7 KiB
YAML
78 lines
1.7 KiB
YAML
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/phy/socionext,uniphier-pcie-phy.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Socionext UniPhier PCIe PHY
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description: |
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This describes the devicetree bindings for PHY interface built into
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PCIe controller implemented on Socionext UniPhier SoCs.
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maintainers:
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- Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
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properties:
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compatible:
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enum:
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- socionext,uniphier-pro5-pcie-phy
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- socionext,uniphier-ld20-pcie-phy
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- socionext,uniphier-pxs3-pcie-phy
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reg:
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description: PHY register region (offset and length)
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"#phy-cells":
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const: 0
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clocks:
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minItems: 1
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maxItems: 2
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clock-names:
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oneOf:
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- items: # for Pro5
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- const: gio
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- const: link
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- const: link # for others
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resets:
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minItems: 1
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maxItems: 2
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reset-names:
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oneOf:
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- items: # for Pro5
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- const: gio
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- const: link
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- const: link # for others
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socionext,syscon:
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$ref: /schemas/types.yaml#/definitions/phandle
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description: A phandle to system control to set configurations for phy
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required:
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- compatible
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- reg
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- "#phy-cells"
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- clocks
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- clock-names
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- resets
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- reset-names
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additionalProperties: false
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examples:
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- |
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pcie_phy: phy@66038000 {
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compatible = "socionext,uniphier-ld20-pcie-phy";
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reg = <0x66038000 0x4000>;
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#phy-cells = <0>;
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clock-names = "link";
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clocks = <&sys_clk 24>;
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reset-names = "link";
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resets = <&sys_rst 24>;
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socionext,syscon = <&soc_glue>;
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};
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