forked from luck/tmp_suning_uos_patched
3c1e716508
Trying to emulate the behaviour of set/way cache ops is fairly pointless, as there are too many ways we can end-up missing stuff. Also, there is some system caches out there that simply ignore set/way operations. So instead of trying to implement them, let's convert it to VA ops, and use them as a way to re-enable the trapping of VM ops. That way, we can detect the point when the MMU/caches are turned off, and do a full VM flush (which is what the guest was trying to do anyway). This allows a 32bit zImage to boot on the APM thingy, and will probably help bootloaders in general. Signed-off-by: Marc Zyngier <marc.zyngier@arm.com> Signed-off-by: Christoffer Dall <christoffer.dall@linaro.org>
55 lines
1.8 KiB
C
55 lines
1.8 KiB
C
/*
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* Copyright (C) 2012 - Virtual Open Systems and Columbia University
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* Copyright (C) 2013 - ARM Ltd
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*
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* Authors: Rusty Russell <rusty@rustcorp.au>
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* Christoffer Dall <c.dall@virtualopensystems.com>
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* Jonathan Austin <jonathan.austin@arm.com>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License, version 2, as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
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*/
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#include <linux/kvm_host.h>
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#include <asm/kvm_coproc.h>
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#include <asm/kvm_emulate.h>
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#include <linux/init.h>
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#include "coproc.h"
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/*
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* Cortex-A7 specific CP15 registers.
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* CRn denotes the primary register number, but is copied to the CRm in the
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* user space API for 64-bit register access in line with the terminology used
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* in the ARM ARM.
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* Important: Must be sorted ascending by CRn, CRM, Op1, Op2 and with 64-bit
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* registers preceding 32-bit ones.
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*/
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static const struct coproc_reg a7_regs[] = {
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/* SCTLR: swapped by interrupt.S. */
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{ CRn( 1), CRm( 0), Op1( 0), Op2( 0), is32,
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access_vm_reg, reset_val, c1_SCTLR, 0x00C50878 },
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};
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static struct kvm_coproc_target_table a7_target_table = {
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.target = KVM_ARM_TARGET_CORTEX_A7,
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.table = a7_regs,
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.num = ARRAY_SIZE(a7_regs),
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};
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static int __init coproc_a7_init(void)
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{
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kvm_register_target_coproc_table(&a7_target_table);
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return 0;
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}
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late_initcall(coproc_a7_init);
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