forked from luck/tmp_suning_uos_patched
418b333afb
commit ecb5bdff901139850fb3ca3ae2d0cccac045bc52 upstream.
extcon driver for Basin Cove PMIC shadows the switch status used for dwc3
DRD to detect a change in the switch position. This change initializes the
status at probe time.
Cc: stable@vger.kernel.org
Fixes: 492929c547
("extcon: mrfld: Introduce extcon driver for Basin Cove PMIC")
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Signed-off-by: Ferry Toth <ftoth@exalondelft.nl>
Signed-off-by: Chanwoo Choi <cw00.choi@samsung.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
294 lines
7.1 KiB
C
294 lines
7.1 KiB
C
// SPDX-License-Identifier: GPL-2.0
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/*
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* extcon driver for Basin Cove PMIC
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*
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* Copyright (c) 2019, Intel Corporation.
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* Author: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
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*/
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#include <linux/extcon-provider.h>
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#include <linux/interrupt.h>
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#include <linux/mfd/intel_soc_pmic.h>
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#include <linux/mfd/intel_soc_pmic_mrfld.h>
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#include <linux/mod_devicetable.h>
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#include <linux/module.h>
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#include <linux/platform_device.h>
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#include <linux/regmap.h>
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#include "extcon-intel.h"
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#define BCOVE_USBIDCTRL 0x19
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#define BCOVE_USBIDCTRL_ID BIT(0)
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#define BCOVE_USBIDCTRL_ACA BIT(1)
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#define BCOVE_USBIDCTRL_ALL (BCOVE_USBIDCTRL_ID | BCOVE_USBIDCTRL_ACA)
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#define BCOVE_USBIDSTS 0x1a
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#define BCOVE_USBIDSTS_GND BIT(0)
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#define BCOVE_USBIDSTS_RARBRC_MASK GENMASK(2, 1)
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#define BCOVE_USBIDSTS_RARBRC_SHIFT 1
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#define BCOVE_USBIDSTS_NO_ACA 0
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#define BCOVE_USBIDSTS_R_ID_A 1
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#define BCOVE_USBIDSTS_R_ID_B 2
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#define BCOVE_USBIDSTS_R_ID_C 3
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#define BCOVE_USBIDSTS_FLOAT BIT(3)
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#define BCOVE_USBIDSTS_SHORT BIT(4)
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#define BCOVE_CHGRIRQ_ALL (BCOVE_CHGRIRQ_VBUSDET | BCOVE_CHGRIRQ_DCDET | \
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BCOVE_CHGRIRQ_BATTDET | BCOVE_CHGRIRQ_USBIDDET)
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#define BCOVE_CHGRCTRL0 0x4b
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#define BCOVE_CHGRCTRL0_CHGRRESET BIT(0)
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#define BCOVE_CHGRCTRL0_EMRGCHREN BIT(1)
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#define BCOVE_CHGRCTRL0_EXTCHRDIS BIT(2)
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#define BCOVE_CHGRCTRL0_SWCONTROL BIT(3)
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#define BCOVE_CHGRCTRL0_TTLCK BIT(4)
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#define BCOVE_CHGRCTRL0_BIT_5 BIT(5)
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#define BCOVE_CHGRCTRL0_BIT_6 BIT(6)
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#define BCOVE_CHGRCTRL0_CHR_WDT_NOKICK BIT(7)
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struct mrfld_extcon_data {
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struct device *dev;
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struct regmap *regmap;
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struct extcon_dev *edev;
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unsigned int status;
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unsigned int id;
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};
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static const unsigned int mrfld_extcon_cable[] = {
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EXTCON_USB,
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EXTCON_USB_HOST,
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EXTCON_CHG_USB_SDP,
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EXTCON_CHG_USB_CDP,
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EXTCON_CHG_USB_DCP,
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EXTCON_CHG_USB_ACA,
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EXTCON_NONE,
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};
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static int mrfld_extcon_clear(struct mrfld_extcon_data *data, unsigned int reg,
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unsigned int mask)
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{
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return regmap_update_bits(data->regmap, reg, mask, 0x00);
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}
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static int mrfld_extcon_set(struct mrfld_extcon_data *data, unsigned int reg,
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unsigned int mask)
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{
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return regmap_update_bits(data->regmap, reg, mask, 0xff);
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}
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static int mrfld_extcon_sw_control(struct mrfld_extcon_data *data, bool enable)
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{
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unsigned int mask = BCOVE_CHGRCTRL0_SWCONTROL;
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struct device *dev = data->dev;
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int ret;
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if (enable)
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ret = mrfld_extcon_set(data, BCOVE_CHGRCTRL0, mask);
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else
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ret = mrfld_extcon_clear(data, BCOVE_CHGRCTRL0, mask);
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if (ret)
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dev_err(dev, "can't set SW control: %d\n", ret);
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return ret;
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}
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static int mrfld_extcon_get_id(struct mrfld_extcon_data *data)
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{
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struct regmap *regmap = data->regmap;
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unsigned int id;
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bool ground;
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int ret;
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ret = regmap_read(regmap, BCOVE_USBIDSTS, &id);
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if (ret)
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return ret;
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if (id & BCOVE_USBIDSTS_FLOAT)
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return INTEL_USB_ID_FLOAT;
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switch ((id & BCOVE_USBIDSTS_RARBRC_MASK) >> BCOVE_USBIDSTS_RARBRC_SHIFT) {
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case BCOVE_USBIDSTS_R_ID_A:
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return INTEL_USB_RID_A;
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case BCOVE_USBIDSTS_R_ID_B:
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return INTEL_USB_RID_B;
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case BCOVE_USBIDSTS_R_ID_C:
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return INTEL_USB_RID_C;
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}
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/*
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* PMIC A0 reports USBIDSTS_GND = 1 for ID_GND,
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* but PMIC B0 reports USBIDSTS_GND = 0 for ID_GND.
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* Thus we must check this bit at last.
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*/
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ground = id & BCOVE_USBIDSTS_GND;
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switch ('A' + BCOVE_MAJOR(data->id)) {
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case 'A':
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return ground ? INTEL_USB_ID_GND : INTEL_USB_ID_FLOAT;
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case 'B':
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return ground ? INTEL_USB_ID_FLOAT : INTEL_USB_ID_GND;
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}
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/* Unknown or unsupported type */
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return INTEL_USB_ID_FLOAT;
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}
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static int mrfld_extcon_role_detect(struct mrfld_extcon_data *data)
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{
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unsigned int id;
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bool usb_host;
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int ret;
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ret = mrfld_extcon_get_id(data);
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if (ret < 0)
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return ret;
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id = ret;
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usb_host = (id == INTEL_USB_ID_GND) || (id == INTEL_USB_RID_A);
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extcon_set_state_sync(data->edev, EXTCON_USB_HOST, usb_host);
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return 0;
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}
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static int mrfld_extcon_cable_detect(struct mrfld_extcon_data *data)
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{
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struct regmap *regmap = data->regmap;
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unsigned int status, change;
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int ret;
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/*
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* It seems SCU firmware clears the content of BCOVE_CHGRIRQ1
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* and makes it useless for OS. Instead we compare a previously
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* stored status to the current one, provided by BCOVE_SCHGRIRQ1.
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*/
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ret = regmap_read(regmap, BCOVE_SCHGRIRQ1, &status);
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if (ret)
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return ret;
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change = status ^ data->status;
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if (!change)
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return -ENODATA;
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if (change & BCOVE_CHGRIRQ_USBIDDET) {
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ret = mrfld_extcon_role_detect(data);
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if (ret)
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return ret;
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}
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data->status = status;
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return 0;
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}
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static irqreturn_t mrfld_extcon_interrupt(int irq, void *dev_id)
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{
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struct mrfld_extcon_data *data = dev_id;
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int ret;
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ret = mrfld_extcon_cable_detect(data);
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mrfld_extcon_clear(data, BCOVE_MIRQLVL1, BCOVE_LVL1_CHGR);
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return ret ? IRQ_NONE: IRQ_HANDLED;
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}
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static int mrfld_extcon_probe(struct platform_device *pdev)
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{
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struct device *dev = &pdev->dev;
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struct intel_soc_pmic *pmic = dev_get_drvdata(dev->parent);
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struct regmap *regmap = pmic->regmap;
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struct mrfld_extcon_data *data;
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unsigned int status;
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unsigned int id;
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int irq, ret;
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irq = platform_get_irq(pdev, 0);
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if (irq < 0)
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return irq;
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data = devm_kzalloc(dev, sizeof(*data), GFP_KERNEL);
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if (!data)
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return -ENOMEM;
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data->dev = dev;
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data->regmap = regmap;
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data->edev = devm_extcon_dev_allocate(dev, mrfld_extcon_cable);
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if (IS_ERR(data->edev))
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return -ENOMEM;
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ret = devm_extcon_dev_register(dev, data->edev);
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if (ret < 0) {
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dev_err(dev, "can't register extcon device: %d\n", ret);
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return ret;
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}
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ret = devm_request_threaded_irq(dev, irq, NULL, mrfld_extcon_interrupt,
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IRQF_ONESHOT | IRQF_SHARED, pdev->name,
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data);
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if (ret) {
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dev_err(dev, "can't register IRQ handler: %d\n", ret);
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return ret;
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}
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ret = regmap_read(regmap, BCOVE_ID, &id);
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if (ret) {
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dev_err(dev, "can't read PMIC ID: %d\n", ret);
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return ret;
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}
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data->id = id;
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ret = mrfld_extcon_sw_control(data, true);
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if (ret)
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return ret;
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/* Get initial state */
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mrfld_extcon_role_detect(data);
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/*
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* Cached status value is used for cable detection, see comments
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* in mrfld_extcon_cable_detect(), we need to sync cached value
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* with a real state of the hardware.
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*/
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regmap_read(regmap, BCOVE_SCHGRIRQ1, &status);
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data->status = status;
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mrfld_extcon_clear(data, BCOVE_MIRQLVL1, BCOVE_LVL1_CHGR);
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mrfld_extcon_clear(data, BCOVE_MCHGRIRQ1, BCOVE_CHGRIRQ_ALL);
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mrfld_extcon_set(data, BCOVE_USBIDCTRL, BCOVE_USBIDCTRL_ALL);
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platform_set_drvdata(pdev, data);
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return 0;
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}
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static int mrfld_extcon_remove(struct platform_device *pdev)
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{
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struct mrfld_extcon_data *data = platform_get_drvdata(pdev);
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mrfld_extcon_sw_control(data, false);
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return 0;
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}
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static const struct platform_device_id mrfld_extcon_id_table[] = {
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{ .name = "mrfld_bcove_pwrsrc" },
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{}
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};
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MODULE_DEVICE_TABLE(platform, mrfld_extcon_id_table);
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static struct platform_driver mrfld_extcon_driver = {
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.driver = {
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.name = "mrfld_bcove_pwrsrc",
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},
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.probe = mrfld_extcon_probe,
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.remove = mrfld_extcon_remove,
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.id_table = mrfld_extcon_id_table,
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};
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module_platform_driver(mrfld_extcon_driver);
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MODULE_AUTHOR("Andy Shevchenko <andriy.shevchenko@linux.intel.com>");
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MODULE_DESCRIPTION("extcon driver for Intel Merrifield Basin Cove PMIC");
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MODULE_LICENSE("GPL v2");
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