Sai Prakash Ranjan 3477326277 coresight: etm4x: Fix save and restore of TRCVMIDCCTLR1 register ... In commit f188b5e76a ("coresight: etm4x: Save/restore state across CPU low power states"), mistakenly TRCVMIDCCTLR1 register value was saved in trcvmidcctlr0 state variable which is used to store TRCVMIDCCTLR0 register value in etm4x_cpu_save() and then same value is written back to both TRCVMIDCCTLR0 and TRCVMIDCCTLR1 in etm4x_cpu_restore(). There is already a trcvmidcctlr1 state variable available for TRCVMIDCCTLR1, so use it. Fixes: f188b5e76a ("coresight: etm4x: Save/restore state across CPU low power states") Reviewed-by: Suzuki K Poulose <suzuki.poulose@arm.com> Signed-off-by: Sai Prakash Ranjan <saiprakash.ranjan@codeaurora.org> Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org> Link: https://lore.kernel.org/r/20200928163513.70169-26-mathieu.poirier@linaro.org Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>		2020-09-28 19:47:42 +02:00
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coresight	coresight: etm4x: Fix save and restore of TRCVMIDCCTLR1 register	2020-09-28 19:47:42 +02:00
intel_th	treewide: Use fallthrough pseudo-keyword	2020-08-23 17:36:59 -05:00
stm	stm class: Replace zero-length array with flexible-array	2020-06-15 23:08:32 -05:00
Kconfig	treewide: Add SPDX license identifier - Makefile/Kconfig	2019-05-21 10:50:46 +02:00