forked from luck/tmp_suning_uos_patched
2874c5fd28
Based on 1 normalized pattern(s): this program is free software you can redistribute it and or modify it under the terms of the gnu general public license as published by the free software foundation either version 2 of the license or at your option any later version extracted by the scancode license scanner the SPDX license identifier GPL-2.0-or-later has been chosen to replace the boilerplate/reference in 3029 file(s). Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Reviewed-by: Allison Randal <allison@lohutok.net> Cc: linux-spdx@vger.kernel.org Link: https://lkml.kernel.org/r/20190527070032.746973796@linutronix.de Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
77 lines
1.9 KiB
C
77 lines
1.9 KiB
C
// SPDX-License-Identifier: GPL-2.0-or-later
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/*
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* 8237A DMA controller suspend functions.
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*
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* Written by Pierre Ossman, 2005.
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*/
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#include <linux/dmi.h>
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#include <linux/init.h>
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#include <linux/syscore_ops.h>
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#include <asm/dma.h>
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#include <asm/x86_init.h>
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/*
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* This module just handles suspend/resume issues with the
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* 8237A DMA controller (used for ISA and LPC).
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* Allocation is handled in kernel/dma.c and normal usage is
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* in asm/dma.h.
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*/
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static void i8237A_resume(void)
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{
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unsigned long flags;
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int i;
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flags = claim_dma_lock();
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dma_outb(0, DMA1_RESET_REG);
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dma_outb(0, DMA2_RESET_REG);
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for (i = 0; i < 8; i++) {
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set_dma_addr(i, 0x000000);
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/* DMA count is a bit weird so this is not 0 */
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set_dma_count(i, 1);
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}
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/* Enable cascade DMA or channel 0-3 won't work */
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enable_dma(4);
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release_dma_lock(flags);
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}
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static struct syscore_ops i8237_syscore_ops = {
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.resume = i8237A_resume,
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};
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static int __init i8237A_init_ops(void)
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{
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/*
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* From SKL PCH onwards, the legacy DMA device is removed in which the
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* I/O ports (81h-83h, 87h, 89h-8Bh, 8Fh) related to it are removed
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* as well. All removed ports must return 0xff for a inb() request.
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*
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* Note: DMA_PAGE_2 (port 0x81) should not be checked for detecting
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* the presence of DMA device since it may be used by BIOS to decode
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* LPC traffic for POST codes. Original LPC only decodes one byte of
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* port 0x80 but some BIOS may choose to enhance PCH LPC port 0x8x
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* decoding.
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*/
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if (dma_inb(DMA_PAGE_0) == 0xFF)
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return -ENODEV;
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/*
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* It is not required to load this driver as newer SoC may not
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* support 8237 DMA or bus mastering from LPC. Platform firmware
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* must announce the support for such legacy devices via
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* ACPI_FADT_LEGACY_DEVICES field in FADT table.
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*/
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if (x86_pnpbios_disabled() && dmi_get_bios_year() >= 2017)
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return -ENODEV;
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register_syscore_ops(&i8237_syscore_ops);
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return 0;
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}
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device_initcall(i8237A_init_ops);
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