forked from luck/tmp_suning_uos_patched
547d9e9261
PWM controller drivers should not restore the PWM state on resume. The convention is that PWM consumers do this by calling pwm_apply_state(), so that it can be done at the exact moment when the consumer needs the state to be stored, avoiding e.g. backlight flickering. The only in kernel consumers of the pwm-lpss code, the i915 driver and the pwm-class sysfs interface code both correctly restore the state on resume, so there is no need to do this in the pwm-lpss code. More-over the removed resume handler is buggy, since it blindly restores the ctrl-register contents without setting the update bit, which is necessary to get the controller to actually use/apply the restored base-unit and on-time-div values. Acked-by: Thierry Reding <thierry.reding@gmail.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20200903112337.4113-8-hdegoede@redhat.com
41 lines
903 B
C
41 lines
903 B
C
/* SPDX-License-Identifier: GPL-2.0-only */
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/*
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* Intel Low Power Subsystem PWM controller driver
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*
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* Copyright (C) 2014, Intel Corporation
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*
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* Derived from the original pwm-lpss.c
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*/
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#ifndef __PWM_LPSS_H
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#define __PWM_LPSS_H
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#include <linux/device.h>
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#include <linux/pwm.h>
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#define MAX_PWMS 4
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struct pwm_lpss_chip {
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struct pwm_chip chip;
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void __iomem *regs;
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const struct pwm_lpss_boardinfo *info;
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};
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struct pwm_lpss_boardinfo {
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unsigned long clk_rate;
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unsigned int npwm;
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unsigned long base_unit_bits;
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bool bypass;
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/*
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* On some devices the _PS0/_PS3 AML code of the GPU (GFX0) device
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* messes with the PWM0 controllers state,
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*/
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bool other_devices_aml_touches_pwm_regs;
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};
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struct pwm_lpss_chip *pwm_lpss_probe(struct device *dev, struct resource *r,
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const struct pwm_lpss_boardinfo *info);
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int pwm_lpss_remove(struct pwm_lpss_chip *lpwm);
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#endif /* __PWM_LPSS_H */
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