forked from luck/tmp_suning_uos_patched
e036eaa681
This patch makes sure ctrl_inN/outN are used instead of inN/outN for on chip pci registers. Without this patch addresses may be adjusted using the value in generic_io_base. This patch makes it possible to set generic_io_base and have pci without reading and writing all over the place. Signed-off-by: Magnus Damm <damm@igel.co.jp> Acked-by: Katsuya MATSUBARA <matsu@igel.co.jp> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
44 lines
1.1 KiB
C
44 lines
1.1 KiB
C
/*
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* arch/sh/drivers/pci/fixups-rts7751r2d.c
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*
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* RTS7751R2D PCI fixups
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*
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* Copyright (C) 2003 Lineo uSolutions, Inc.
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* Copyright (C) 2004 Paul Mundt
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*
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* This file is subject to the terms and conditions of the GNU General Public
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* License. See the file "COPYING" in the main directory of this archive
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* for more details.
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*/
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#include "pci-sh4.h"
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#define PCIMCR_MRSET_OFF 0xBFFFFFFF
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#define PCIMCR_RFSH_OFF 0xFFFFFFFB
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int pci_fixup_pcic(void)
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{
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unsigned long bcr1, mcr;
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bcr1 = ctrl_inl(SH7751_BCR1);
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bcr1 |= 0x40080000; /* Enable Bit 19 BREQEN, set PCIC to slave */
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pci_write_reg(bcr1, SH4_PCIBCR1);
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/* Enable all interrupts, so we known what to fix */
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pci_write_reg(0x0000c3ff, SH4_PCIINTM);
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pci_write_reg(0x0000380f, SH4_PCIAINTM);
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pci_write_reg(0xfb900047, SH7751_PCICONF1);
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pci_write_reg(0xab000001, SH7751_PCICONF4);
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mcr = ctrl_inl(SH7751_MCR);
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mcr = (mcr & PCIMCR_MRSET_OFF) & PCIMCR_RFSH_OFF;
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pci_write_reg(mcr, SH4_PCIMCR);
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pci_write_reg(0x0c000000, SH7751_PCICONF5);
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pci_write_reg(0xd0000000, SH7751_PCICONF6);
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pci_write_reg(0x0c000000, SH4_PCILAR0);
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pci_write_reg(0x00000000, SH4_PCILAR1);
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return 0;
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}
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