Brian Norris 3dad2344e9 mtd: nand: force NAND_CMD_READID onto 8-bit bus ... The NAND command helpers tend to automatically shift the column address for x16 bus devices, since most commands expect a word address, not a byte address. The Read ID command, however, expects an 8-bit address (i.e., 0x00, 0x20, or 0x40 should not be translated to 0x00, 0x10, or 0x20). This fixes the column address for a few drivers which imitate the nand_base defaults. Note that I don't touch sh_flctl.c, since it already handles this problem slightly differently (note its comment "READID is always performed using an 8-bit bus"). I have not tested this patch, as I only have x8 parts up for testing at this point. Hopefully that can change soon... Signed-off-by: Brian Norris <computersforpeace@gmail.com> Tested-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com> Tested-By: Pekon Gupta <pekon@ti.com>		2014-03-10 22:42:22 -07:00
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bbm.h	mtd: nand_bbt: kill NAND_BBT_SCANALLPAGES	2013-11-06 23:33:14 -08:00
blktrans.h
cfi_endian.h
cfi.h
concat.h
doc2000.h
flashchip.h
fsmc.h
ftl.h
gen_probe.h
inftl.h
latch-addr-flash.h
lpc32xx_mlc.h
lpc32xx_slc.h
map.h	mtd: map: fixed bug in 64-bit systems	2013-11-06 23:32:59 -08:00
mtd.h	mtd: Move major number definitions to major.h	2013-11-06 23:32:59 -08:00
mtdram.h	mtd: mtdram: add missing 'const'	2014-01-20 11:55:23 -08:00
nand_bch.h
nand_ecc.h
nand-gpio.h
nand.h	mtd: nand: force NAND_CMD_READID onto 8-bit bus	2014-03-10 22:42:22 -07:00
ndfc.h
nftl.h
onenand_regs.h
onenand.h
partitions.h	mtd: make register_mtd_parser return void	2014-01-03 11:22:22 -08:00
pfow.h
physmap.h
pismo.h
plat-ram.h
qinfo.h
sh_flctl.h
sharpsl.h
spear_smi.h
super.h
ubi.h
xip.h