forked from luck/tmp_suning_uos_patched
7c4b24da07
Signed-off-by: Manuel Lauss <manuel.lauss@googlemail.com> To: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/2884/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
168 lines
5.0 KiB
C
168 lines
5.0 KiB
C
/*
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* Pb1100 board platform device registration
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*
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* Copyright (C) 2009 Manuel Lauss
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
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*/
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#include <linux/delay.h>
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#include <linux/gpio.h>
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#include <linux/init.h>
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#include <linux/interrupt.h>
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#include <linux/dma-mapping.h>
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#include <linux/platform_device.h>
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#include <asm/mach-au1x00/au1000.h>
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#include <asm/mach-db1x00/bcsr.h>
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#include <prom.h>
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#include "platform.h"
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const char *get_system_type(void)
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{
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return "PB1100";
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}
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void __init board_setup(void)
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{
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volatile void __iomem *base = (volatile void __iomem *)0xac000000UL;
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bcsr_init(DB1000_BCSR_PHYS_ADDR,
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DB1000_BCSR_PHYS_ADDR + DB1000_BCSR_HEXLED_OFS);
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/* Set AUX clock to 12 MHz * 8 = 96 MHz */
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au_writel(8, SYS_AUXPLL);
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alchemy_gpio1_input_enable();
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udelay(100);
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#if defined(CONFIG_USB_OHCI_HCD) || defined(CONFIG_USB_OHCI_HCD_MODULE)
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{
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u32 pin_func, sys_freqctrl, sys_clksrc;
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/* Configure pins GPIO[14:9] as GPIO */
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pin_func = au_readl(SYS_PINFUNC) & ~SYS_PF_UR3;
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/* Zero and disable FREQ2 */
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sys_freqctrl = au_readl(SYS_FREQCTRL0);
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sys_freqctrl &= ~0xFFF00000;
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au_writel(sys_freqctrl, SYS_FREQCTRL0);
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/* Zero and disable USBH/USBD/IrDA clock */
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sys_clksrc = au_readl(SYS_CLKSRC);
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sys_clksrc &= ~(SYS_CS_CIR | SYS_CS_DIR | SYS_CS_MIR_MASK);
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au_writel(sys_clksrc, SYS_CLKSRC);
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sys_freqctrl = au_readl(SYS_FREQCTRL0);
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sys_freqctrl &= ~0xFFF00000;
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sys_clksrc = au_readl(SYS_CLKSRC);
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sys_clksrc &= ~(SYS_CS_CIR | SYS_CS_DIR | SYS_CS_MIR_MASK);
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/* FREQ2 = aux / 2 = 48 MHz */
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sys_freqctrl |= (0 << SYS_FC_FRDIV2_BIT) |
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SYS_FC_FE2 | SYS_FC_FS2;
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au_writel(sys_freqctrl, SYS_FREQCTRL0);
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/*
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* Route 48 MHz FREQ2 into USBH/USBD/IrDA
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*/
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sys_clksrc |= SYS_CS_MUX_FQ2 << SYS_CS_MIR_BIT;
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au_writel(sys_clksrc, SYS_CLKSRC);
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/* Setup the static bus controller */
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au_writel(0x00000002, MEM_STCFG3); /* type = PCMCIA */
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au_writel(0x280E3D07, MEM_STTIME3); /* 250ns cycle time */
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au_writel(0x10000000, MEM_STADDR3); /* any PCMCIA select */
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/*
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* Get USB Functionality pin state (device vs host drive pins).
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*/
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pin_func = au_readl(SYS_PINFUNC) & ~SYS_PF_USB;
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/* 2nd USB port is USB host. */
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pin_func |= SYS_PF_USB;
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au_writel(pin_func, SYS_PINFUNC);
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}
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#endif /* defined(CONFIG_USB_OHCI_HCD) || defined(CONFIG_USB_OHCI_HCD_MODULE) */
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/* Enable sys bus clock divider when IDLE state or no bus activity. */
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au_writel(au_readl(SYS_POWERCTRL) | (0x3 << 5), SYS_POWERCTRL);
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/* Enable the RTC if not already enabled. */
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if (!(readb(base + 0x28) & 0x20)) {
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writeb(readb(base + 0x28) | 0x20, base + 0x28);
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au_sync();
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}
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/* Put the clock in BCD mode. */
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if (readb(base + 0x2C) & 0x4) { /* reg B */
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writeb(readb(base + 0x2c) & ~0x4, base + 0x2c);
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au_sync();
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}
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}
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/******************************************************************************/
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static struct resource au1100_lcd_resources[] = {
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[0] = {
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.start = AU1100_LCD_PHYS_ADDR,
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.end = AU1100_LCD_PHYS_ADDR + 0x800 - 1,
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.flags = IORESOURCE_MEM,
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},
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[1] = {
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.start = AU1100_LCD_INT,
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.end = AU1100_LCD_INT,
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.flags = IORESOURCE_IRQ,
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}
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};
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static u64 au1100_lcd_dmamask = DMA_BIT_MASK(32);
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static struct platform_device au1100_lcd_device = {
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.name = "au1100-lcd",
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.id = 0,
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.dev = {
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.dma_mask = &au1100_lcd_dmamask,
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.coherent_dma_mask = DMA_BIT_MASK(32),
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},
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.num_resources = ARRAY_SIZE(au1100_lcd_resources),
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.resource = au1100_lcd_resources,
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};
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static int __init pb1100_dev_init(void)
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{
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int swapped;
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irq_set_irq_type(AU1100_GPIO9_INT, IRQF_TRIGGER_LOW); /* PCCD# */
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irq_set_irq_type(AU1100_GPIO10_INT, IRQF_TRIGGER_LOW); /* PCSTSCHG# */
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irq_set_irq_type(AU1100_GPIO11_INT, IRQF_TRIGGER_LOW); /* PCCard# */
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irq_set_irq_type(AU1100_GPIO13_INT, IRQF_TRIGGER_LOW); /* DC_IRQ# */
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/* PCMCIA. single socket, identical to Pb1500 */
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db1x_register_pcmcia_socket(
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AU1000_PCMCIA_ATTR_PHYS_ADDR,
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AU1000_PCMCIA_ATTR_PHYS_ADDR + 0x000400000 - 1,
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AU1000_PCMCIA_MEM_PHYS_ADDR,
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AU1000_PCMCIA_MEM_PHYS_ADDR + 0x000400000 - 1,
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AU1000_PCMCIA_IO_PHYS_ADDR,
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AU1000_PCMCIA_IO_PHYS_ADDR + 0x000010000 - 1,
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AU1100_GPIO11_INT, AU1100_GPIO9_INT, /* card / insert */
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/*AU1100_GPIO10_INT*/0, 0, 0); /* stschg / eject / id */
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swapped = bcsr_read(BCSR_STATUS) & BCSR_STATUS_DB1000_SWAPBOOT;
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db1x_register_norflash(64 * 1024 * 1024, 4, swapped);
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platform_device_register(&au1100_lcd_device);
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return 0;
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}
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device_initcall(pb1100_dev_init);
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