forked from luck/tmp_suning_uos_patched
bd8dd593f7
This clock is present on BCM53573 devices (including BCM47189) that use Cortex-A7. ILP is a part of PMU (Power Management Unit) multi-function device so we use syscon (and regmap) for it. Signed-off-by: Rafał Miłecki <rafal@milecki.pl> Acked-by: Rob Herring <robh@kernel.org> [sboyd@codeaurora.org: Remove 0 from clk_init_data to silence sparse] Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
149 lines
3.5 KiB
C
149 lines
3.5 KiB
C
/*
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* Copyright (C) 2016 Rafał Miłecki <rafal@milecki.pl>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#include <linux/clk-provider.h>
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#include <linux/err.h>
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#include <linux/io.h>
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#include <linux/mfd/syscon.h>
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#include <linux/of.h>
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#include <linux/of_address.h>
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#include <linux/regmap.h>
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#include <linux/slab.h>
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#define PMU_XTAL_FREQ_RATIO 0x66c
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#define XTAL_ALP_PER_4ILP 0x00001fff
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#define XTAL_CTL_EN 0x80000000
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#define PMU_SLOW_CLK_PERIOD 0x6dc
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struct bcm53573_ilp {
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struct clk_hw hw;
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struct regmap *regmap;
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};
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static int bcm53573_ilp_enable(struct clk_hw *hw)
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{
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struct bcm53573_ilp *ilp = container_of(hw, struct bcm53573_ilp, hw);
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regmap_write(ilp->regmap, PMU_SLOW_CLK_PERIOD, 0x10199);
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regmap_write(ilp->regmap, 0x674, 0x10000);
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return 0;
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}
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static void bcm53573_ilp_disable(struct clk_hw *hw)
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{
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struct bcm53573_ilp *ilp = container_of(hw, struct bcm53573_ilp, hw);
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regmap_write(ilp->regmap, PMU_SLOW_CLK_PERIOD, 0);
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regmap_write(ilp->regmap, 0x674, 0);
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}
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static unsigned long bcm53573_ilp_recalc_rate(struct clk_hw *hw,
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unsigned long parent_rate)
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{
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struct bcm53573_ilp *ilp = container_of(hw, struct bcm53573_ilp, hw);
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struct regmap *regmap = ilp->regmap;
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u32 last_val, cur_val;
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int sum = 0, num = 0, loop_num = 0;
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int avg;
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/* Enable measurement */
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regmap_write(regmap, PMU_XTAL_FREQ_RATIO, XTAL_CTL_EN);
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/* Read initial value */
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regmap_read(regmap, PMU_XTAL_FREQ_RATIO, &last_val);
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last_val &= XTAL_ALP_PER_4ILP;
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/*
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* At minimum we should loop for a bit to let hardware do the
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* measurement. This isn't very accurate however, so for a better
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* precision lets try getting 20 different values for and use average.
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*/
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while (num < 20) {
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regmap_read(regmap, PMU_XTAL_FREQ_RATIO, &cur_val);
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cur_val &= XTAL_ALP_PER_4ILP;
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if (cur_val != last_val) {
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/* Got different value, use it */
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sum += cur_val;
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num++;
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loop_num = 0;
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last_val = cur_val;
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} else if (++loop_num > 5000) {
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/* Same value over and over, give up */
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sum += cur_val;
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num++;
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break;
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}
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cpu_relax();
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}
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/* Disable measurement to save power */
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regmap_write(regmap, PMU_XTAL_FREQ_RATIO, 0x0);
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avg = sum / num;
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return parent_rate * 4 / avg;
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}
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static const struct clk_ops bcm53573_ilp_clk_ops = {
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.enable = bcm53573_ilp_enable,
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.disable = bcm53573_ilp_disable,
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.recalc_rate = bcm53573_ilp_recalc_rate,
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};
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static void bcm53573_ilp_init(struct device_node *np)
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{
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struct bcm53573_ilp *ilp;
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struct clk_init_data init = { };
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const char *parent_name;
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int err;
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ilp = kzalloc(sizeof(*ilp), GFP_KERNEL);
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if (!ilp)
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return;
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parent_name = of_clk_get_parent_name(np, 0);
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if (!parent_name) {
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err = -ENOENT;
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goto err_free_ilp;
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}
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ilp->regmap = syscon_node_to_regmap(of_get_parent(np));
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if (IS_ERR(ilp->regmap)) {
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err = PTR_ERR(ilp->regmap);
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goto err_free_ilp;
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}
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init.name = np->name;
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init.ops = &bcm53573_ilp_clk_ops;
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init.parent_names = &parent_name;
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init.num_parents = 1;
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ilp->hw.init = &init;
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err = clk_hw_register(NULL, &ilp->hw);
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if (err)
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goto err_free_ilp;
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err = of_clk_add_hw_provider(np, of_clk_hw_simple_get, &ilp->hw);
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if (err)
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goto err_clk_hw_unregister;
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return;
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err_clk_hw_unregister:
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clk_hw_unregister(&ilp->hw);
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err_free_ilp:
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kfree(ilp);
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pr_err("Failed to init ILP clock: %d\n", err);
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}
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/* We need it very early for arch code, before device model gets ready */
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CLK_OF_DECLARE(bcm53573_ilp_clk, "brcm,bcm53573-ilp", bcm53573_ilp_init);
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