AcoSail/kernel_optimize_test
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kernel_optimize_test/drivers/gpu/drm/panel
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Stefan Agner eaeebffa90 drm/panel: simple: Specify bus width and flags for EDT displays 
The display has a 18-Bit parallel LCD interface, require DE to be
active high and data driven by the controller on falling pixel
clock edge (display samples on rising edge).

Signed-off-by: Stefan Agner <stefan@agner.ch>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2017-01-26 10:57:18 +01:00
..
Kconfig drm/panel: Add JDI LT070ME05000 WUXGA DSI Panel 2016-09-16 17:32:48 +02:00
Makefile drm/panel: Add JDI LT070ME05000 WUXGA DSI Panel 2016-09-16 17:32:48 +02:00
panel-jdi-lt070me05000.c drm/panel: Add JDI LT070ME05000 WUXGA DSI Panel 2016-09-16 17:32:48 +02:00
panel-lg-lg4573.c
panel-panasonic-vvx10f034n00.c drm/panel: Add Panasonic VVX10F034N00 MIPI DSI panel 2015-11-23 12:33:21 +01:00
panel-samsung-ld9040.c
panel-samsung-s6e8aa0.c
panel-sharp-lq101r1sx01.c
panel-sharp-ls043t1le01.c drm/panel: Add Sharp LS043T1LE01 MIPI DSI panel 2015-11-24 10:25:15 +01:00
panel-simple.c drm/panel: simple: Specify bus width and flags for EDT displays 2017-01-26 10:57:18 +01:00