forked from luck/tmp_suning_uos_patched
d9322d226f
* pci/dpc: PCI: Add Downstream Port Containment driver PCI: Add Downstream Port Containment portdrv service type PCI: Widen portdrv service type from 4 bits to 8 bits * pci/resource: alpha/PCI: Call iomem_is_exclusive() for IORESOURCE_MEM, but not IORESOURCE_IO PCI: Supply CPU physical address (not bus address) to iomem_is_exclusive() * pci/thunderbolt: thunderbolt: Fix double free of drom buffer
62 lines
1.8 KiB
C
62 lines
1.8 KiB
C
/*
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* PCIe Port Native Services Support, ACPI-Related Part
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*
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* Copyright (C) 2010 Rafael J. Wysocki <rjw@sisk.pl>, Novell Inc.
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*
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* This file is subject to the terms and conditions of the GNU General Public
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* License V2. See the file "COPYING" in the main directory of this archive
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* for more details.
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*/
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#include <linux/pci.h>
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#include <linux/kernel.h>
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#include <linux/errno.h>
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#include <linux/acpi.h>
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#include <linux/pci-acpi.h>
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#include <linux/pcieport_if.h>
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#include "aer/aerdrv.h"
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#include "../pci.h"
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#include "portdrv.h"
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/**
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* pcie_port_acpi_setup - Request the BIOS to release control of PCIe services.
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* @port: PCIe Port service for a root port or event collector.
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* @srv_mask: Bit mask of services that can be enabled for @port.
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*
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* Invoked when @port is identified as a PCIe port device. To avoid conflicts
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* with the BIOS PCIe port native services support requires the BIOS to yield
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* control of these services to the kernel. The mask of services that the BIOS
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* allows to be enabled for @port is written to @srv_mask.
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*
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* NOTE: It turns out that we cannot do that for individual port services
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* separately, because that would make some systems work incorrectly.
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*/
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void pcie_port_acpi_setup(struct pci_dev *port, int *srv_mask)
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{
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struct acpi_pci_root *root;
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acpi_handle handle;
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u32 flags;
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if (acpi_pci_disabled)
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return;
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handle = acpi_find_root_bridge_handle(port);
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if (!handle)
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return;
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root = acpi_pci_find_root(handle);
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if (!root)
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return;
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flags = root->osc_control_set;
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*srv_mask = PCIE_PORT_SERVICE_VC | PCIE_PORT_SERVICE_DPC;
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if (flags & OSC_PCI_EXPRESS_NATIVE_HP_CONTROL)
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*srv_mask |= PCIE_PORT_SERVICE_HP;
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if (flags & OSC_PCI_EXPRESS_PME_CONTROL)
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*srv_mask |= PCIE_PORT_SERVICE_PME;
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if (flags & OSC_PCI_EXPRESS_AER_CONTROL)
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*srv_mask |= PCIE_PORT_SERVICE_AER;
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}
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