forked from luck/tmp_suning_uos_patched
e5f02a3109
Now that we have split the DSA platform data structures from the main net/dsa.h header file, include only the relevant header file. Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
269 lines
6.0 KiB
C
269 lines
6.0 KiB
C
/*
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* arch/arm/mach-orion5x/wrt350n-v2-setup.c
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*
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* This file is licensed under the terms of the GNU General Public
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* License version 2. This program is licensed "as is" without any
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* warranty of any kind, whether express or implied.
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*/
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#include <linux/gpio.h>
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#include <linux/kernel.h>
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#include <linux/init.h>
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#include <linux/platform_device.h>
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#include <linux/pci.h>
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#include <linux/irq.h>
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#include <linux/delay.h>
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#include <linux/mtd/physmap.h>
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#include <linux/mv643xx_eth.h>
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#include <linux/ethtool.h>
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#include <linux/leds.h>
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#include <linux/gpio_keys.h>
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#include <linux/input.h>
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#include <linux/platform_data/dsa.h>
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#include <asm/mach-types.h>
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#include <asm/mach/arch.h>
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#include <asm/mach/pci.h>
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#include "orion5x.h"
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#include "common.h"
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#include "mpp.h"
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/*
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* LEDs attached to GPIO
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*/
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static struct gpio_led wrt350n_v2_led_pins[] = {
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{
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.name = "wrt350nv2:green:power",
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.gpio = 0,
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.active_low = 1,
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}, {
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.name = "wrt350nv2:green:security",
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.gpio = 1,
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.active_low = 1,
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}, {
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.name = "wrt350nv2:orange:power",
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.gpio = 5,
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.active_low = 1,
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}, {
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.name = "wrt350nv2:green:usb",
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.gpio = 6,
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.active_low = 1,
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}, {
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.name = "wrt350nv2:green:wireless",
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.gpio = 7,
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.active_low = 1,
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},
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};
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static struct gpio_led_platform_data wrt350n_v2_led_data = {
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.leds = wrt350n_v2_led_pins,
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.num_leds = ARRAY_SIZE(wrt350n_v2_led_pins),
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};
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static struct platform_device wrt350n_v2_leds = {
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.name = "leds-gpio",
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.id = -1,
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.dev = {
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.platform_data = &wrt350n_v2_led_data,
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},
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};
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/*
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* Buttons attached to GPIO
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*/
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static struct gpio_keys_button wrt350n_v2_buttons[] = {
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{
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.code = KEY_RESTART,
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.gpio = 3,
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.desc = "Reset Button",
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.active_low = 1,
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}, {
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.code = KEY_WPS_BUTTON,
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.gpio = 2,
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.desc = "WPS Button",
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.active_low = 1,
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},
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};
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static struct gpio_keys_platform_data wrt350n_v2_button_data = {
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.buttons = wrt350n_v2_buttons,
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.nbuttons = ARRAY_SIZE(wrt350n_v2_buttons),
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};
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static struct platform_device wrt350n_v2_button_device = {
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.name = "gpio-keys",
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.id = -1,
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.num_resources = 0,
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.dev = {
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.platform_data = &wrt350n_v2_button_data,
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},
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};
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/*
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* General setup
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*/
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static unsigned int wrt350n_v2_mpp_modes[] __initdata = {
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MPP0_GPIO, /* Power LED green (0=on) */
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MPP1_GPIO, /* Security LED (0=on) */
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MPP2_GPIO, /* Internal Button (0=on) */
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MPP3_GPIO, /* Reset Button (0=on) */
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MPP4_GPIO, /* PCI int */
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MPP5_GPIO, /* Power LED orange (0=on) */
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MPP6_GPIO, /* USB LED (0=on) */
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MPP7_GPIO, /* Wireless LED (0=on) */
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MPP8_UNUSED, /* ??? */
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MPP9_GIGE, /* GE_RXERR */
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MPP10_UNUSED, /* ??? */
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MPP11_UNUSED, /* ??? */
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MPP12_GIGE, /* GE_TXD[4] */
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MPP13_GIGE, /* GE_TXD[5] */
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MPP14_GIGE, /* GE_TXD[6] */
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MPP15_GIGE, /* GE_TXD[7] */
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MPP16_GIGE, /* GE_RXD[4] */
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MPP17_GIGE, /* GE_RXD[5] */
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MPP18_GIGE, /* GE_RXD[6] */
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MPP19_GIGE, /* GE_RXD[7] */
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0,
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};
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/*
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* 8M NOR flash Device bus boot chip select
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*/
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#define WRT350N_V2_NOR_BOOT_BASE 0xf4000000
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#define WRT350N_V2_NOR_BOOT_SIZE SZ_8M
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static struct mtd_partition wrt350n_v2_nor_flash_partitions[] = {
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{
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.name = "kernel",
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.offset = 0x00000000,
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.size = 0x00760000,
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}, {
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.name = "rootfs",
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.offset = 0x001a0000,
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.size = 0x005c0000,
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}, {
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.name = "lang",
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.offset = 0x00760000,
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.size = 0x00040000,
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}, {
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.name = "nvram",
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.offset = 0x007a0000,
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.size = 0x00020000,
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}, {
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.name = "u-boot",
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.offset = 0x007c0000,
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.size = 0x00040000,
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},
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};
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static struct physmap_flash_data wrt350n_v2_nor_flash_data = {
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.width = 1,
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.parts = wrt350n_v2_nor_flash_partitions,
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.nr_parts = ARRAY_SIZE(wrt350n_v2_nor_flash_partitions),
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};
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static struct resource wrt350n_v2_nor_flash_resource = {
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.flags = IORESOURCE_MEM,
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.start = WRT350N_V2_NOR_BOOT_BASE,
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.end = WRT350N_V2_NOR_BOOT_BASE + WRT350N_V2_NOR_BOOT_SIZE - 1,
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};
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static struct platform_device wrt350n_v2_nor_flash = {
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.name = "physmap-flash",
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.id = 0,
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.dev = {
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.platform_data = &wrt350n_v2_nor_flash_data,
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},
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.num_resources = 1,
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.resource = &wrt350n_v2_nor_flash_resource,
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};
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static struct mv643xx_eth_platform_data wrt350n_v2_eth_data = {
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.phy_addr = MV643XX_ETH_PHY_NONE,
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.speed = SPEED_1000,
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.duplex = DUPLEX_FULL,
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};
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static struct dsa_chip_data wrt350n_v2_switch_chip_data = {
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.port_names[0] = "lan2",
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.port_names[1] = "lan1",
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.port_names[2] = "wan",
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.port_names[3] = "cpu",
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.port_names[5] = "lan3",
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.port_names[7] = "lan4",
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};
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static void __init wrt350n_v2_init(void)
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{
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/*
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* Setup basic Orion functions. Need to be called early.
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*/
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orion5x_init();
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orion5x_mpp_conf(wrt350n_v2_mpp_modes);
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/*
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* Configure peripherals.
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*/
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orion5x_ehci0_init();
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orion5x_eth_init(&wrt350n_v2_eth_data);
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orion5x_eth_switch_init(&wrt350n_v2_switch_chip_data);
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orion5x_uart0_init();
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mvebu_mbus_add_window_by_id(ORION_MBUS_DEVBUS_BOOT_TARGET,
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ORION_MBUS_DEVBUS_BOOT_ATTR,
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WRT350N_V2_NOR_BOOT_BASE,
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WRT350N_V2_NOR_BOOT_SIZE);
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platform_device_register(&wrt350n_v2_nor_flash);
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platform_device_register(&wrt350n_v2_leds);
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platform_device_register(&wrt350n_v2_button_device);
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}
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static int __init wrt350n_v2_pci_map_irq(const struct pci_dev *dev, u8 slot,
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u8 pin)
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{
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int irq;
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/*
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* Check for devices with hard-wired IRQs.
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*/
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irq = orion5x_pci_map_irq(dev, slot, pin);
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if (irq != -1)
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return irq;
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/*
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* Mini-PCI slot.
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*/
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if (slot == 7)
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return gpio_to_irq(4);
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return -1;
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}
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static struct hw_pci wrt350n_v2_pci __initdata = {
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.nr_controllers = 2,
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.setup = orion5x_pci_sys_setup,
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.scan = orion5x_pci_sys_scan_bus,
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.map_irq = wrt350n_v2_pci_map_irq,
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};
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static int __init wrt350n_v2_pci_init(void)
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{
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if (machine_is_wrt350n_v2())
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pci_common_init(&wrt350n_v2_pci);
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return 0;
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}
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subsys_initcall(wrt350n_v2_pci_init);
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MACHINE_START(WRT350N_V2, "Linksys WRT350N v2")
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/* Maintainer: Lennert Buytenhek <buytenh@marvell.com> */
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.atag_offset = 0x100,
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.nr_irqs = ORION5X_NR_IRQS,
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.init_machine = wrt350n_v2_init,
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.map_io = orion5x_map_io,
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.init_early = orion5x_init_early,
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.init_irq = orion5x_init_irq,
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.init_time = orion5x_timer_init,
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.fixup = tag_fixup_mem32,
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.restart = orion5x_restart,
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MACHINE_END
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