forked from luck/tmp_suning_uos_patched
51533b615e
New CRIS sub architecture named v32. From: Dave Jones <davej@redhat.com> Fix swapped kmalloc args Signed-off-by: Mikael Starvik <starvik@axis.com> Signed-off-by: Dave Jones <davej@redhat.com> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
358 lines
9.7 KiB
C
358 lines
9.7 KiB
C
#ifndef __pinmux_defs_h
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#define __pinmux_defs_h
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/*
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* This file is autogenerated from
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* file: ../../inst/pinmux/rtl/guinness/pinmux_regs.r
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* id: pinmux_regs.r,v 1.40 2005/02/09 16:22:59 perz Exp
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* last modfied: Mon Apr 11 16:09:11 2005
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*
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* by /n/asic/design/tools/rdesc/src/rdes2c --outfile pinmux_defs.h ../../inst/pinmux/rtl/guinness/pinmux_regs.r
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* id: $Id: pinmux_defs.h,v 1.3 2005/04/24 18:30:58 starvik Exp $
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* Any changes here will be lost.
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*
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* -*- buffer-read-only: t -*-
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*/
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/* Main access macros */
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#ifndef REG_RD
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#define REG_RD( scope, inst, reg ) \
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REG_READ( reg_##scope##_##reg, \
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(inst) + REG_RD_ADDR_##scope##_##reg )
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#endif
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#ifndef REG_WR
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#define REG_WR( scope, inst, reg, val ) \
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REG_WRITE( reg_##scope##_##reg, \
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(inst) + REG_WR_ADDR_##scope##_##reg, (val) )
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#endif
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#ifndef REG_RD_VECT
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#define REG_RD_VECT( scope, inst, reg, index ) \
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REG_READ( reg_##scope##_##reg, \
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(inst) + REG_RD_ADDR_##scope##_##reg + \
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(index) * STRIDE_##scope##_##reg )
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#endif
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#ifndef REG_WR_VECT
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#define REG_WR_VECT( scope, inst, reg, index, val ) \
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REG_WRITE( reg_##scope##_##reg, \
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(inst) + REG_WR_ADDR_##scope##_##reg + \
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(index) * STRIDE_##scope##_##reg, (val) )
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#endif
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#ifndef REG_RD_INT
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#define REG_RD_INT( scope, inst, reg ) \
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REG_READ( int, (inst) + REG_RD_ADDR_##scope##_##reg )
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#endif
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#ifndef REG_WR_INT
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#define REG_WR_INT( scope, inst, reg, val ) \
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REG_WRITE( int, (inst) + REG_WR_ADDR_##scope##_##reg, (val) )
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#endif
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#ifndef REG_RD_INT_VECT
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#define REG_RD_INT_VECT( scope, inst, reg, index ) \
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REG_READ( int, (inst) + REG_RD_ADDR_##scope##_##reg + \
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(index) * STRIDE_##scope##_##reg )
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#endif
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#ifndef REG_WR_INT_VECT
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#define REG_WR_INT_VECT( scope, inst, reg, index, val ) \
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REG_WRITE( int, (inst) + REG_WR_ADDR_##scope##_##reg + \
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(index) * STRIDE_##scope##_##reg, (val) )
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#endif
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#ifndef REG_TYPE_CONV
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#define REG_TYPE_CONV( type, orgtype, val ) \
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( { union { orgtype o; type n; } r; r.o = val; r.n; } )
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#endif
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#ifndef reg_page_size
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#define reg_page_size 8192
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#endif
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#ifndef REG_ADDR
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#define REG_ADDR( scope, inst, reg ) \
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( (inst) + REG_RD_ADDR_##scope##_##reg )
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#endif
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#ifndef REG_ADDR_VECT
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#define REG_ADDR_VECT( scope, inst, reg, index ) \
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( (inst) + REG_RD_ADDR_##scope##_##reg + \
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(index) * STRIDE_##scope##_##reg )
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#endif
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/* C-code for register scope pinmux */
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/* Register rw_pa, scope pinmux, type rw */
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typedef struct {
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unsigned int pa0 : 1;
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unsigned int pa1 : 1;
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unsigned int pa2 : 1;
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unsigned int pa3 : 1;
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unsigned int pa4 : 1;
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unsigned int pa5 : 1;
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unsigned int pa6 : 1;
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unsigned int pa7 : 1;
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unsigned int csp2_n : 1;
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unsigned int csp3_n : 1;
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unsigned int csp5_n : 1;
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unsigned int csp6_n : 1;
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unsigned int hsh4 : 1;
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unsigned int hsh5 : 1;
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unsigned int hsh6 : 1;
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unsigned int hsh7 : 1;
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unsigned int dummy1 : 16;
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} reg_pinmux_rw_pa;
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#define REG_RD_ADDR_pinmux_rw_pa 0
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#define REG_WR_ADDR_pinmux_rw_pa 0
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/* Register rw_hwprot, scope pinmux, type rw */
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typedef struct {
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unsigned int ser1 : 1;
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unsigned int ser2 : 1;
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unsigned int ser3 : 1;
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unsigned int sser0 : 1;
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unsigned int sser1 : 1;
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unsigned int ata0 : 1;
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unsigned int ata1 : 1;
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unsigned int ata2 : 1;
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unsigned int ata3 : 1;
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unsigned int ata : 1;
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unsigned int eth1 : 1;
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unsigned int eth1_mgm : 1;
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unsigned int timer : 1;
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unsigned int p21 : 1;
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unsigned int dummy1 : 18;
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} reg_pinmux_rw_hwprot;
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#define REG_RD_ADDR_pinmux_rw_hwprot 4
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#define REG_WR_ADDR_pinmux_rw_hwprot 4
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/* Register rw_pb_gio, scope pinmux, type rw */
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typedef struct {
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unsigned int pb0 : 1;
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unsigned int pb1 : 1;
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unsigned int pb2 : 1;
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unsigned int pb3 : 1;
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unsigned int pb4 : 1;
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unsigned int pb5 : 1;
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unsigned int pb6 : 1;
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unsigned int pb7 : 1;
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unsigned int pb8 : 1;
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unsigned int pb9 : 1;
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unsigned int pb10 : 1;
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unsigned int pb11 : 1;
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unsigned int pb12 : 1;
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unsigned int pb13 : 1;
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unsigned int pb14 : 1;
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unsigned int pb15 : 1;
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unsigned int pb16 : 1;
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unsigned int pb17 : 1;
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unsigned int dummy1 : 14;
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} reg_pinmux_rw_pb_gio;
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#define REG_RD_ADDR_pinmux_rw_pb_gio 8
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#define REG_WR_ADDR_pinmux_rw_pb_gio 8
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/* Register rw_pb_iop, scope pinmux, type rw */
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typedef struct {
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unsigned int pb0 : 1;
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unsigned int pb1 : 1;
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unsigned int pb2 : 1;
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unsigned int pb3 : 1;
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unsigned int pb4 : 1;
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unsigned int pb5 : 1;
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unsigned int pb6 : 1;
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unsigned int pb7 : 1;
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unsigned int pb8 : 1;
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unsigned int pb9 : 1;
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unsigned int pb10 : 1;
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unsigned int pb11 : 1;
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unsigned int pb12 : 1;
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unsigned int pb13 : 1;
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unsigned int pb14 : 1;
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unsigned int pb15 : 1;
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unsigned int pb16 : 1;
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unsigned int pb17 : 1;
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unsigned int dummy1 : 14;
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} reg_pinmux_rw_pb_iop;
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#define REG_RD_ADDR_pinmux_rw_pb_iop 12
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#define REG_WR_ADDR_pinmux_rw_pb_iop 12
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/* Register rw_pc_gio, scope pinmux, type rw */
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typedef struct {
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unsigned int pc0 : 1;
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unsigned int pc1 : 1;
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unsigned int pc2 : 1;
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unsigned int pc3 : 1;
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unsigned int pc4 : 1;
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unsigned int pc5 : 1;
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unsigned int pc6 : 1;
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unsigned int pc7 : 1;
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unsigned int pc8 : 1;
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unsigned int pc9 : 1;
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unsigned int pc10 : 1;
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unsigned int pc11 : 1;
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unsigned int pc12 : 1;
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unsigned int pc13 : 1;
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unsigned int pc14 : 1;
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unsigned int pc15 : 1;
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unsigned int pc16 : 1;
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unsigned int pc17 : 1;
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unsigned int dummy1 : 14;
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} reg_pinmux_rw_pc_gio;
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#define REG_RD_ADDR_pinmux_rw_pc_gio 16
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#define REG_WR_ADDR_pinmux_rw_pc_gio 16
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/* Register rw_pc_iop, scope pinmux, type rw */
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typedef struct {
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unsigned int pc0 : 1;
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unsigned int pc1 : 1;
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unsigned int pc2 : 1;
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unsigned int pc3 : 1;
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unsigned int pc4 : 1;
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unsigned int pc5 : 1;
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unsigned int pc6 : 1;
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unsigned int pc7 : 1;
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unsigned int pc8 : 1;
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unsigned int pc9 : 1;
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unsigned int pc10 : 1;
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unsigned int pc11 : 1;
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unsigned int pc12 : 1;
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unsigned int pc13 : 1;
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unsigned int pc14 : 1;
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unsigned int pc15 : 1;
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unsigned int pc16 : 1;
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unsigned int pc17 : 1;
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unsigned int dummy1 : 14;
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} reg_pinmux_rw_pc_iop;
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#define REG_RD_ADDR_pinmux_rw_pc_iop 20
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#define REG_WR_ADDR_pinmux_rw_pc_iop 20
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/* Register rw_pd_gio, scope pinmux, type rw */
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typedef struct {
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unsigned int pd0 : 1;
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unsigned int pd1 : 1;
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unsigned int pd2 : 1;
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unsigned int pd3 : 1;
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unsigned int pd4 : 1;
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unsigned int pd5 : 1;
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unsigned int pd6 : 1;
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unsigned int pd7 : 1;
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unsigned int pd8 : 1;
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unsigned int pd9 : 1;
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unsigned int pd10 : 1;
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unsigned int pd11 : 1;
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unsigned int pd12 : 1;
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unsigned int pd13 : 1;
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unsigned int pd14 : 1;
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unsigned int pd15 : 1;
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unsigned int pd16 : 1;
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unsigned int pd17 : 1;
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unsigned int dummy1 : 14;
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} reg_pinmux_rw_pd_gio;
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#define REG_RD_ADDR_pinmux_rw_pd_gio 24
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#define REG_WR_ADDR_pinmux_rw_pd_gio 24
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/* Register rw_pd_iop, scope pinmux, type rw */
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typedef struct {
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unsigned int pd0 : 1;
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unsigned int pd1 : 1;
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unsigned int pd2 : 1;
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unsigned int pd3 : 1;
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unsigned int pd4 : 1;
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unsigned int pd5 : 1;
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unsigned int pd6 : 1;
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unsigned int pd7 : 1;
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unsigned int pd8 : 1;
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unsigned int pd9 : 1;
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unsigned int pd10 : 1;
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unsigned int pd11 : 1;
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unsigned int pd12 : 1;
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unsigned int pd13 : 1;
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unsigned int pd14 : 1;
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unsigned int pd15 : 1;
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unsigned int pd16 : 1;
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unsigned int pd17 : 1;
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unsigned int dummy1 : 14;
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} reg_pinmux_rw_pd_iop;
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#define REG_RD_ADDR_pinmux_rw_pd_iop 28
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#define REG_WR_ADDR_pinmux_rw_pd_iop 28
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/* Register rw_pe_gio, scope pinmux, type rw */
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typedef struct {
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unsigned int pe0 : 1;
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unsigned int pe1 : 1;
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unsigned int pe2 : 1;
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unsigned int pe3 : 1;
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unsigned int pe4 : 1;
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unsigned int pe5 : 1;
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unsigned int pe6 : 1;
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unsigned int pe7 : 1;
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unsigned int pe8 : 1;
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unsigned int pe9 : 1;
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unsigned int pe10 : 1;
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unsigned int pe11 : 1;
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unsigned int pe12 : 1;
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unsigned int pe13 : 1;
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unsigned int pe14 : 1;
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unsigned int pe15 : 1;
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unsigned int pe16 : 1;
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unsigned int pe17 : 1;
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unsigned int dummy1 : 14;
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} reg_pinmux_rw_pe_gio;
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#define REG_RD_ADDR_pinmux_rw_pe_gio 32
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#define REG_WR_ADDR_pinmux_rw_pe_gio 32
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/* Register rw_pe_iop, scope pinmux, type rw */
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typedef struct {
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unsigned int pe0 : 1;
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unsigned int pe1 : 1;
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unsigned int pe2 : 1;
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unsigned int pe3 : 1;
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unsigned int pe4 : 1;
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unsigned int pe5 : 1;
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unsigned int pe6 : 1;
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unsigned int pe7 : 1;
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unsigned int pe8 : 1;
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unsigned int pe9 : 1;
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unsigned int pe10 : 1;
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unsigned int pe11 : 1;
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unsigned int pe12 : 1;
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unsigned int pe13 : 1;
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unsigned int pe14 : 1;
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unsigned int pe15 : 1;
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unsigned int pe16 : 1;
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unsigned int pe17 : 1;
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unsigned int dummy1 : 14;
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} reg_pinmux_rw_pe_iop;
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#define REG_RD_ADDR_pinmux_rw_pe_iop 36
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#define REG_WR_ADDR_pinmux_rw_pe_iop 36
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/* Register rw_usb_phy, scope pinmux, type rw */
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typedef struct {
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unsigned int en_usb0 : 1;
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unsigned int en_usb1 : 1;
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unsigned int dummy1 : 30;
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} reg_pinmux_rw_usb_phy;
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#define REG_RD_ADDR_pinmux_rw_usb_phy 40
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#define REG_WR_ADDR_pinmux_rw_usb_phy 40
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/* Constants */
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enum {
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regk_pinmux_no = 0x00000000,
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regk_pinmux_rw_hwprot_default = 0x00000000,
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regk_pinmux_rw_pa_default = 0x00000000,
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regk_pinmux_rw_pb_gio_default = 0x00000000,
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regk_pinmux_rw_pb_iop_default = 0x00000000,
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regk_pinmux_rw_pc_gio_default = 0x00000000,
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regk_pinmux_rw_pc_iop_default = 0x00000000,
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regk_pinmux_rw_pd_gio_default = 0x00000000,
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regk_pinmux_rw_pd_iop_default = 0x00000000,
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regk_pinmux_rw_pe_gio_default = 0x00000000,
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regk_pinmux_rw_pe_iop_default = 0x00000000,
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regk_pinmux_rw_usb_phy_default = 0x00000000,
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regk_pinmux_yes = 0x00000001
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};
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#endif /* __pinmux_defs_h */
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