kernel_optimize_test/arch/arm/mach-rockchip/sleep.S
Thomas Gleixner 2025cf9e19 treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 288
Based on 1 normalized pattern(s):

  this program is free software you can redistribute it and or modify
  it under the terms and conditions of the gnu general public license
  version 2 as published by the free software foundation this program
  is distributed in the hope it will be useful but without any
  warranty without even the implied warranty of merchantability or
  fitness for a particular purpose see the gnu general public license
  for more details

extracted by the scancode license scanner the SPDX license identifier

  GPL-2.0-only

has been chosen to replace the boilerplate/reference in 263 file(s).

Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Reviewed-by: Allison Randal <allison@lohutok.net>
Reviewed-by: Alexios Zavras <alexios.zavras@intel.com>
Cc: linux-spdx@vger.kernel.org
Link: https://lkml.kernel.org/r/20190529141901.208660670@linutronix.de
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2019-06-05 17:36:37 +02:00

65 lines
1.4 KiB
ArmAsm

/* SPDX-License-Identifier: GPL-2.0-only */
/*
* Copyright (c) 2014, Fuzhou Rockchip Electronics Co., Ltd
* Author: Tony Xie <tony.xie@rock-chips.com>
*/
#include <linux/linkage.h>
#include <asm/assembler.h>
#include <asm/memory.h>
.data
/*
* this code will be copied from
* ddr to sram for system resumeing.
* so it is ".data section".
*/
.align 2
ENTRY(rockchip_slp_cpu_resume)
setmode PSR_I_BIT | PSR_F_BIT | SVC_MODE, r1 @ set svc, irqs off
mrc p15, 0, r1, c0, c0, 5
and r1, r1, #0xf
cmp r1, #0
/* olny cpu0 can continue to run, the others is halt here */
beq cpu0run
secondary_loop:
wfe
b secondary_loop
cpu0run:
ldr r3, rkpm_bootdata_l2ctlr_f
cmp r3, #0
beq sp_set
ldr r3, rkpm_bootdata_l2ctlr
mcr p15, 1, r3, c9, c0, 2
sp_set:
ldr sp, rkpm_bootdata_cpusp
ldr r1, rkpm_bootdata_cpu_code
bx r1
ENDPROC(rockchip_slp_cpu_resume)
/* Parameters filled in by the kernel */
/* Flag for whether to restore L2CTLR on resume */
.global rkpm_bootdata_l2ctlr_f
rkpm_bootdata_l2ctlr_f:
.long 0
/* Saved L2CTLR to restore on resume */
.global rkpm_bootdata_l2ctlr
rkpm_bootdata_l2ctlr:
.long 0
/* CPU resume SP addr */
.globl rkpm_bootdata_cpusp
rkpm_bootdata_cpusp:
.long 0
/* CPU resume function (physical address) */
.globl rkpm_bootdata_cpu_code
rkpm_bootdata_cpu_code:
.long 0
ENTRY(rk3288_bootram_sz)
.word . - rockchip_slp_cpu_resume