forked from luck/tmp_suning_uos_patched
6978bbc097
Updates the RIO messaging interface to pass a device instance into the event registeration and callbacks. Signed-off-by: Matt Porter <mporter@kernel.crashing.org> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
939 lines
25 KiB
C
939 lines
25 KiB
C
/*
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* MPC85xx RapidIO support
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*
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* Copyright 2005 MontaVista Software, Inc.
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* Matt Porter <mporter@kernel.crashing.org>
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License as published by the
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* Free Software Foundation; either version 2 of the License, or (at your
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* option) any later version.
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*/
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#include <linux/config.h>
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#include <linux/init.h>
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#include <linux/module.h>
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#include <linux/types.h>
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#include <linux/dma-mapping.h>
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#include <linux/interrupt.h>
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#include <linux/rio.h>
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#include <linux/rio_drv.h>
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#include <asm/io.h>
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#define RIO_REGS_BASE (CCSRBAR + 0xc0000)
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#define RIO_ATMU_REGS_OFFSET 0x10c00
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#define RIO_MSG_REGS_OFFSET 0x11000
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#define RIO_MAINT_WIN_SIZE 0x400000
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#define RIO_DBELL_WIN_SIZE 0x1000
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#define RIO_MSG_OMR_MUI 0x00000002
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#define RIO_MSG_OSR_TE 0x00000080
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#define RIO_MSG_OSR_QOI 0x00000020
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#define RIO_MSG_OSR_QFI 0x00000010
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#define RIO_MSG_OSR_MUB 0x00000004
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#define RIO_MSG_OSR_EOMI 0x00000002
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#define RIO_MSG_OSR_QEI 0x00000001
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#define RIO_MSG_IMR_MI 0x00000002
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#define RIO_MSG_ISR_TE 0x00000080
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#define RIO_MSG_ISR_QFI 0x00000010
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#define RIO_MSG_ISR_DIQI 0x00000001
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#define RIO_MSG_DESC_SIZE 32
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#define RIO_MSG_BUFFER_SIZE 4096
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#define RIO_MIN_TX_RING_SIZE 2
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#define RIO_MAX_TX_RING_SIZE 2048
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#define RIO_MIN_RX_RING_SIZE 2
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#define RIO_MAX_RX_RING_SIZE 2048
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#define DOORBELL_DMR_DI 0x00000002
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#define DOORBELL_DSR_TE 0x00000080
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#define DOORBELL_DSR_QFI 0x00000010
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#define DOORBELL_DSR_DIQI 0x00000001
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#define DOORBELL_TID_OFFSET 0x03
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#define DOORBELL_SID_OFFSET 0x05
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#define DOORBELL_INFO_OFFSET 0x06
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#define DOORBELL_MESSAGE_SIZE 0x08
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#define DBELL_SID(x) (*(u8 *)(x + DOORBELL_SID_OFFSET))
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#define DBELL_TID(x) (*(u8 *)(x + DOORBELL_TID_OFFSET))
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#define DBELL_INF(x) (*(u16 *)(x + DOORBELL_INFO_OFFSET))
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#define is_power_of_2(x) (((x) & ((x) - 1)) == 0)
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struct rio_atmu_regs {
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u32 rowtar;
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u32 pad1;
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u32 rowbar;
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u32 pad2;
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u32 rowar;
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u32 pad3[3];
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};
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struct rio_msg_regs {
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u32 omr;
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u32 osr;
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u32 pad1;
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u32 odqdpar;
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u32 pad2;
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u32 osar;
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u32 odpr;
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u32 odatr;
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u32 odcr;
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u32 pad3;
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u32 odqepar;
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u32 pad4[13];
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u32 imr;
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u32 isr;
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u32 pad5;
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u32 ifqdpar;
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u32 pad6;
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u32 ifqepar;
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u32 pad7[250];
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u32 dmr;
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u32 dsr;
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u32 pad8;
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u32 dqdpar;
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u32 pad9;
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u32 dqepar;
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u32 pad10[26];
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u32 pwmr;
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u32 pwsr;
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u32 pad11;
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u32 pwqbar;
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};
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struct rio_tx_desc {
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u32 res1;
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u32 saddr;
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u32 dport;
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u32 dattr;
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u32 res2;
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u32 res3;
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u32 dwcnt;
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u32 res4;
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};
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static u32 regs_win;
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static struct rio_atmu_regs *atmu_regs;
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static struct rio_atmu_regs *maint_atmu_regs;
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static struct rio_atmu_regs *dbell_atmu_regs;
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static u32 dbell_win;
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static u32 maint_win;
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static struct rio_msg_regs *msg_regs;
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static struct rio_dbell_ring {
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void *virt;
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dma_addr_t phys;
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} dbell_ring;
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static struct rio_msg_tx_ring {
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void *virt;
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dma_addr_t phys;
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void *virt_buffer[RIO_MAX_TX_RING_SIZE];
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dma_addr_t phys_buffer[RIO_MAX_TX_RING_SIZE];
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int tx_slot;
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int size;
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void *dev_id;
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} msg_tx_ring;
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static struct rio_msg_rx_ring {
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void *virt;
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dma_addr_t phys;
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void *virt_buffer[RIO_MAX_RX_RING_SIZE];
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int rx_slot;
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int size;
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void *dev_id;
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} msg_rx_ring;
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/**
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* mpc85xx_rio_doorbell_send - Send a MPC85xx doorbell message
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* @index: ID of RapidIO interface
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* @destid: Destination ID of target device
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* @data: 16-bit info field of RapidIO doorbell message
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*
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* Sends a MPC85xx doorbell message. Returns %0 on success or
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* %-EINVAL on failure.
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*/
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static int mpc85xx_rio_doorbell_send(int index, u16 destid, u16 data)
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{
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pr_debug("mpc85xx_doorbell_send: index %d destid %4.4x data %4.4x\n",
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index, destid, data);
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out_be32((void *)&dbell_atmu_regs->rowtar, destid << 22);
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out_be16((void *)(dbell_win), data);
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return 0;
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}
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/**
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* mpc85xx_local_config_read - Generate a MPC85xx local config space read
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* @index: ID of RapdiIO interface
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* @offset: Offset into configuration space
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* @len: Length (in bytes) of the maintenance transaction
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* @data: Value to be read into
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*
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* Generates a MPC85xx local configuration space read. Returns %0 on
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* success or %-EINVAL on failure.
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*/
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static int mpc85xx_local_config_read(int index, u32 offset, int len, u32 * data)
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{
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pr_debug("mpc85xx_local_config_read: index %d offset %8.8x\n", index,
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offset);
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*data = in_be32((void *)(regs_win + offset));
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return 0;
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}
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/**
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* mpc85xx_local_config_write - Generate a MPC85xx local config space write
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* @index: ID of RapdiIO interface
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* @offset: Offset into configuration space
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* @len: Length (in bytes) of the maintenance transaction
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* @data: Value to be written
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*
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* Generates a MPC85xx local configuration space write. Returns %0 on
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* success or %-EINVAL on failure.
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*/
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static int mpc85xx_local_config_write(int index, u32 offset, int len, u32 data)
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{
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pr_debug
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("mpc85xx_local_config_write: index %d offset %8.8x data %8.8x\n",
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index, offset, data);
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out_be32((void *)(regs_win + offset), data);
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return 0;
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}
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/**
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* mpc85xx_rio_config_read - Generate a MPC85xx read maintenance transaction
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* @index: ID of RapdiIO interface
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* @destid: Destination ID of transaction
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* @hopcount: Number of hops to target device
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* @offset: Offset into configuration space
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* @len: Length (in bytes) of the maintenance transaction
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* @val: Location to be read into
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*
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* Generates a MPC85xx read maintenance transaction. Returns %0 on
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* success or %-EINVAL on failure.
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*/
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static int
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mpc85xx_rio_config_read(int index, u16 destid, u8 hopcount, u32 offset, int len,
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u32 * val)
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{
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u8 *data;
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pr_debug
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("mpc85xx_rio_config_read: index %d destid %d hopcount %d offset %8.8x len %d\n",
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index, destid, hopcount, offset, len);
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out_be32((void *)&maint_atmu_regs->rowtar,
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(destid << 22) | (hopcount << 12) | ((offset & ~0x3) >> 9));
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data = (u8 *) maint_win + offset;
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switch (len) {
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case 1:
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*val = in_8((u8 *) data);
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break;
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case 2:
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*val = in_be16((u16 *) data);
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break;
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default:
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*val = in_be32((u32 *) data);
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break;
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}
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return 0;
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}
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/**
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* mpc85xx_rio_config_write - Generate a MPC85xx write maintenance transaction
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* @index: ID of RapdiIO interface
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* @destid: Destination ID of transaction
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* @hopcount: Number of hops to target device
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* @offset: Offset into configuration space
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* @len: Length (in bytes) of the maintenance transaction
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* @val: Value to be written
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*
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* Generates an MPC85xx write maintenance transaction. Returns %0 on
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* success or %-EINVAL on failure.
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*/
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static int
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mpc85xx_rio_config_write(int index, u16 destid, u8 hopcount, u32 offset,
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int len, u32 val)
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{
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u8 *data;
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pr_debug
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("mpc85xx_rio_config_write: index %d destid %d hopcount %d offset %8.8x len %d val %8.8x\n",
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index, destid, hopcount, offset, len, val);
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out_be32((void *)&maint_atmu_regs->rowtar,
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(destid << 22) | (hopcount << 12) | ((offset & ~0x3) >> 9));
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data = (u8 *) maint_win + offset;
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switch (len) {
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case 1:
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out_8((u8 *) data, val);
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break;
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case 2:
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out_be16((u16 *) data, val);
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break;
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default:
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out_be32((u32 *) data, val);
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break;
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}
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return 0;
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}
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/**
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* rio_hw_add_outb_message - Add message to the MPC85xx outbound message queue
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* @mport: Master port with outbound message queue
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* @rdev: Target of outbound message
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* @mbox: Outbound mailbox
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* @buffer: Message to add to outbound queue
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* @len: Length of message
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*
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* Adds the @buffer message to the MPC85xx outbound message queue. Returns
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* %0 on success or %-EINVAL on failure.
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*/
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int
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rio_hw_add_outb_message(struct rio_mport *mport, struct rio_dev *rdev, int mbox,
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void *buffer, size_t len)
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{
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u32 omr;
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struct rio_tx_desc *desc =
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(struct rio_tx_desc *)msg_tx_ring.virt + msg_tx_ring.tx_slot;
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int ret = 0;
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pr_debug
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("RIO: rio_hw_add_outb_message(): destid %4.4x mbox %d buffer %8.8x len %8.8x\n",
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rdev->destid, mbox, (int)buffer, len);
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if ((len < 8) || (len > RIO_MAX_MSG_SIZE)) {
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ret = -EINVAL;
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goto out;
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}
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/* Copy and clear rest of buffer */
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memcpy(msg_tx_ring.virt_buffer[msg_tx_ring.tx_slot], buffer, len);
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if (len < (RIO_MAX_MSG_SIZE - 4))
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memset((void *)((u32) msg_tx_ring.
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virt_buffer[msg_tx_ring.tx_slot] + len), 0,
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RIO_MAX_MSG_SIZE - len);
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/* Set mbox field for message */
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desc->dport = mbox & 0x3;
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/* Enable EOMI interrupt, set priority, and set destid */
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desc->dattr = 0x28000000 | (rdev->destid << 2);
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/* Set transfer size aligned to next power of 2 (in double words) */
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desc->dwcnt = is_power_of_2(len) ? len : 1 << get_bitmask_order(len);
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/* Set snooping and source buffer address */
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desc->saddr = 0x00000004 | msg_tx_ring.phys_buffer[msg_tx_ring.tx_slot];
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/* Increment enqueue pointer */
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omr = in_be32((void *)&msg_regs->omr);
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out_be32((void *)&msg_regs->omr, omr | RIO_MSG_OMR_MUI);
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/* Go to next descriptor */
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if (++msg_tx_ring.tx_slot == msg_tx_ring.size)
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msg_tx_ring.tx_slot = 0;
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out:
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return ret;
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}
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EXPORT_SYMBOL_GPL(rio_hw_add_outb_message);
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/**
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* mpc85xx_rio_tx_handler - MPC85xx outbound message interrupt handler
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* @irq: Linux interrupt number
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* @dev_instance: Pointer to interrupt-specific data
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* @regs: Register context
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*
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* Handles outbound message interrupts. Executes a register outbound
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* mailbox event handler and acks the interrupt occurence.
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*/
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static irqreturn_t
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mpc85xx_rio_tx_handler(int irq, void *dev_instance, struct pt_regs *regs)
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{
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int osr;
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struct rio_mport *port = (struct rio_mport *)dev_instance;
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osr = in_be32((void *)&msg_regs->osr);
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if (osr & RIO_MSG_OSR_TE) {
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pr_info("RIO: outbound message transmission error\n");
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out_be32((void *)&msg_regs->osr, RIO_MSG_OSR_TE);
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goto out;
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}
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if (osr & RIO_MSG_OSR_QOI) {
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pr_info("RIO: outbound message queue overflow\n");
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out_be32((void *)&msg_regs->osr, RIO_MSG_OSR_QOI);
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goto out;
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}
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if (osr & RIO_MSG_OSR_EOMI) {
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u32 dqp = in_be32((void *)&msg_regs->odqdpar);
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int slot = (dqp - msg_tx_ring.phys) >> 5;
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port->outb_msg[0].mcback(port, msg_tx_ring.dev_id, -1, slot);
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/* Ack the end-of-message interrupt */
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out_be32((void *)&msg_regs->osr, RIO_MSG_OSR_EOMI);
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}
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out:
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return IRQ_HANDLED;
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}
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/**
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* rio_open_outb_mbox - Initialize MPC85xx outbound mailbox
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* @mport: Master port implementing the outbound message unit
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* @dev_id: Device specific pointer to pass on event
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* @mbox: Mailbox to open
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* @entries: Number of entries in the outbound mailbox ring
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*
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* Initializes buffer ring, request the outbound message interrupt,
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* and enables the outbound message unit. Returns %0 on success and
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* %-EINVAL or %-ENOMEM on failure.
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*/
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int rio_open_outb_mbox(struct rio_mport *mport, void *dev_id, int mbox, int entries)
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{
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int i, j, rc = 0;
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if ((entries < RIO_MIN_TX_RING_SIZE) ||
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(entries > RIO_MAX_TX_RING_SIZE) || (!is_power_of_2(entries))) {
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rc = -EINVAL;
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goto out;
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}
|
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/* Initialize shadow copy ring */
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msg_tx_ring.dev_id = dev_id;
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msg_tx_ring.size = entries;
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for (i = 0; i < msg_tx_ring.size; i++) {
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if (!
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(msg_tx_ring.virt_buffer[i] =
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dma_alloc_coherent(NULL, RIO_MSG_BUFFER_SIZE,
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&msg_tx_ring.phys_buffer[i],
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GFP_KERNEL))) {
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rc = -ENOMEM;
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for (j = 0; j < msg_tx_ring.size; j++)
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if (msg_tx_ring.virt_buffer[j])
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dma_free_coherent(NULL,
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RIO_MSG_BUFFER_SIZE,
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msg_tx_ring.
|
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virt_buffer[j],
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msg_tx_ring.
|
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phys_buffer[j]);
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goto out;
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}
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}
|
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|
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/* Initialize outbound message descriptor ring */
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if (!(msg_tx_ring.virt = dma_alloc_coherent(NULL,
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msg_tx_ring.size *
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RIO_MSG_DESC_SIZE,
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&msg_tx_ring.phys,
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GFP_KERNEL))) {
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rc = -ENOMEM;
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goto out_dma;
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}
|
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memset(msg_tx_ring.virt, 0, msg_tx_ring.size * RIO_MSG_DESC_SIZE);
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msg_tx_ring.tx_slot = 0;
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|
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/* Point dequeue/enqueue pointers at first entry in ring */
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out_be32((void *)&msg_regs->odqdpar, msg_tx_ring.phys);
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out_be32((void *)&msg_regs->odqepar, msg_tx_ring.phys);
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|
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/* Configure for snooping */
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out_be32((void *)&msg_regs->osar, 0x00000004);
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|
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/* Clear interrupt status */
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out_be32((void *)&msg_regs->osr, 0x000000b3);
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|
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/* Hook up outbound message handler */
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if ((rc =
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request_irq(MPC85xx_IRQ_RIO_TX, mpc85xx_rio_tx_handler, 0,
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"msg_tx", (void *)mport)) < 0)
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goto out_irq;
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|
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/*
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* Configure outbound message unit
|
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* Snooping
|
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* Interrupts (all enabled, except QEIE)
|
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* Chaining mode
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* Disable
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*/
|
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out_be32((void *)&msg_regs->omr, 0x00100220);
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|
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/* Set number of entries */
|
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out_be32((void *)&msg_regs->omr,
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in_be32((void *)&msg_regs->omr) |
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((get_bitmask_order(entries) - 2) << 12));
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|
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/* Now enable the unit */
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out_be32((void *)&msg_regs->omr, in_be32((void *)&msg_regs->omr) | 0x1);
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|
|
out:
|
|
return rc;
|
|
|
|
out_irq:
|
|
dma_free_coherent(NULL, msg_tx_ring.size * RIO_MSG_DESC_SIZE,
|
|
msg_tx_ring.virt, msg_tx_ring.phys);
|
|
|
|
out_dma:
|
|
for (i = 0; i < msg_tx_ring.size; i++)
|
|
dma_free_coherent(NULL, RIO_MSG_BUFFER_SIZE,
|
|
msg_tx_ring.virt_buffer[i],
|
|
msg_tx_ring.phys_buffer[i]);
|
|
|
|
return rc;
|
|
}
|
|
|
|
/**
|
|
* rio_close_outb_mbox - Shut down MPC85xx outbound mailbox
|
|
* @mport: Master port implementing the outbound message unit
|
|
* @mbox: Mailbox to close
|
|
*
|
|
* Disables the outbound message unit, free all buffers, and
|
|
* frees the outbound message interrupt.
|
|
*/
|
|
void rio_close_outb_mbox(struct rio_mport *mport, int mbox)
|
|
{
|
|
/* Disable inbound message unit */
|
|
out_be32((void *)&msg_regs->omr, 0);
|
|
|
|
/* Free ring */
|
|
dma_free_coherent(NULL, msg_tx_ring.size * RIO_MSG_DESC_SIZE,
|
|
msg_tx_ring.virt, msg_tx_ring.phys);
|
|
|
|
/* Free interrupt */
|
|
free_irq(MPC85xx_IRQ_RIO_TX, (void *)mport);
|
|
}
|
|
|
|
/**
|
|
* mpc85xx_rio_rx_handler - MPC85xx inbound message interrupt handler
|
|
* @irq: Linux interrupt number
|
|
* @dev_instance: Pointer to interrupt-specific data
|
|
* @regs: Register context
|
|
*
|
|
* Handles inbound message interrupts. Executes a registered inbound
|
|
* mailbox event handler and acks the interrupt occurence.
|
|
*/
|
|
static irqreturn_t
|
|
mpc85xx_rio_rx_handler(int irq, void *dev_instance, struct pt_regs *regs)
|
|
{
|
|
int isr;
|
|
struct rio_mport *port = (struct rio_mport *)dev_instance;
|
|
|
|
isr = in_be32((void *)&msg_regs->isr);
|
|
|
|
if (isr & RIO_MSG_ISR_TE) {
|
|
pr_info("RIO: inbound message reception error\n");
|
|
out_be32((void *)&msg_regs->isr, RIO_MSG_ISR_TE);
|
|
goto out;
|
|
}
|
|
|
|
/* XXX Need to check/dispatch until queue empty */
|
|
if (isr & RIO_MSG_ISR_DIQI) {
|
|
/*
|
|
* We implement *only* mailbox 0, but can receive messages
|
|
* for any mailbox/letter to that mailbox destination. So,
|
|
* make the callback with an unknown/invalid mailbox number
|
|
* argument.
|
|
*/
|
|
port->inb_msg[0].mcback(port, msg_rx_ring.dev_id, -1, -1);
|
|
|
|
/* Ack the queueing interrupt */
|
|
out_be32((void *)&msg_regs->isr, RIO_MSG_ISR_DIQI);
|
|
}
|
|
|
|
out:
|
|
return IRQ_HANDLED;
|
|
}
|
|
|
|
/**
|
|
* rio_open_inb_mbox - Initialize MPC85xx inbound mailbox
|
|
* @mport: Master port implementing the inbound message unit
|
|
* @dev_id: Device specific pointer to pass on event
|
|
* @mbox: Mailbox to open
|
|
* @entries: Number of entries in the inbound mailbox ring
|
|
*
|
|
* Initializes buffer ring, request the inbound message interrupt,
|
|
* and enables the inbound message unit. Returns %0 on success
|
|
* and %-EINVAL or %-ENOMEM on failure.
|
|
*/
|
|
int rio_open_inb_mbox(struct rio_mport *mport, void *dev_id, int mbox, int entries)
|
|
{
|
|
int i, rc = 0;
|
|
|
|
if ((entries < RIO_MIN_RX_RING_SIZE) ||
|
|
(entries > RIO_MAX_RX_RING_SIZE) || (!is_power_of_2(entries))) {
|
|
rc = -EINVAL;
|
|
goto out;
|
|
}
|
|
|
|
/* Initialize client buffer ring */
|
|
msg_rx_ring.dev_id = dev_id;
|
|
msg_rx_ring.size = entries;
|
|
msg_rx_ring.rx_slot = 0;
|
|
for (i = 0; i < msg_rx_ring.size; i++)
|
|
msg_rx_ring.virt_buffer[i] = NULL;
|
|
|
|
/* Initialize inbound message ring */
|
|
if (!(msg_rx_ring.virt = dma_alloc_coherent(NULL,
|
|
msg_rx_ring.size *
|
|
RIO_MAX_MSG_SIZE,
|
|
&msg_rx_ring.phys,
|
|
GFP_KERNEL))) {
|
|
rc = -ENOMEM;
|
|
goto out;
|
|
}
|
|
|
|
/* Point dequeue/enqueue pointers at first entry in ring */
|
|
out_be32((void *)&msg_regs->ifqdpar, (u32) msg_rx_ring.phys);
|
|
out_be32((void *)&msg_regs->ifqepar, (u32) msg_rx_ring.phys);
|
|
|
|
/* Clear interrupt status */
|
|
out_be32((void *)&msg_regs->isr, 0x00000091);
|
|
|
|
/* Hook up inbound message handler */
|
|
if ((rc =
|
|
request_irq(MPC85xx_IRQ_RIO_RX, mpc85xx_rio_rx_handler, 0,
|
|
"msg_rx", (void *)mport)) < 0) {
|
|
dma_free_coherent(NULL, RIO_MSG_BUFFER_SIZE,
|
|
msg_tx_ring.virt_buffer[i],
|
|
msg_tx_ring.phys_buffer[i]);
|
|
goto out;
|
|
}
|
|
|
|
/*
|
|
* Configure inbound message unit:
|
|
* Snooping
|
|
* 4KB max message size
|
|
* Unmask all interrupt sources
|
|
* Disable
|
|
*/
|
|
out_be32((void *)&msg_regs->imr, 0x001b0060);
|
|
|
|
/* Set number of queue entries */
|
|
out_be32((void *)&msg_regs->imr,
|
|
in_be32((void *)&msg_regs->imr) |
|
|
((get_bitmask_order(entries) - 2) << 12));
|
|
|
|
/* Now enable the unit */
|
|
out_be32((void *)&msg_regs->imr, in_be32((void *)&msg_regs->imr) | 0x1);
|
|
|
|
out:
|
|
return rc;
|
|
}
|
|
|
|
/**
|
|
* rio_close_inb_mbox - Shut down MPC85xx inbound mailbox
|
|
* @mport: Master port implementing the inbound message unit
|
|
* @mbox: Mailbox to close
|
|
*
|
|
* Disables the inbound message unit, free all buffers, and
|
|
* frees the inbound message interrupt.
|
|
*/
|
|
void rio_close_inb_mbox(struct rio_mport *mport, int mbox)
|
|
{
|
|
/* Disable inbound message unit */
|
|
out_be32((void *)&msg_regs->imr, 0);
|
|
|
|
/* Free ring */
|
|
dma_free_coherent(NULL, msg_rx_ring.size * RIO_MAX_MSG_SIZE,
|
|
msg_rx_ring.virt, msg_rx_ring.phys);
|
|
|
|
/* Free interrupt */
|
|
free_irq(MPC85xx_IRQ_RIO_RX, (void *)mport);
|
|
}
|
|
|
|
/**
|
|
* rio_hw_add_inb_buffer - Add buffer to the MPC85xx inbound message queue
|
|
* @mport: Master port implementing the inbound message unit
|
|
* @mbox: Inbound mailbox number
|
|
* @buf: Buffer to add to inbound queue
|
|
*
|
|
* Adds the @buf buffer to the MPC85xx inbound message queue. Returns
|
|
* %0 on success or %-EINVAL on failure.
|
|
*/
|
|
int rio_hw_add_inb_buffer(struct rio_mport *mport, int mbox, void *buf)
|
|
{
|
|
int rc = 0;
|
|
|
|
pr_debug("RIO: rio_hw_add_inb_buffer(), msg_rx_ring.rx_slot %d\n",
|
|
msg_rx_ring.rx_slot);
|
|
|
|
if (msg_rx_ring.virt_buffer[msg_rx_ring.rx_slot]) {
|
|
printk(KERN_ERR
|
|
"RIO: error adding inbound buffer %d, buffer exists\n",
|
|
msg_rx_ring.rx_slot);
|
|
rc = -EINVAL;
|
|
goto out;
|
|
}
|
|
|
|
msg_rx_ring.virt_buffer[msg_rx_ring.rx_slot] = buf;
|
|
if (++msg_rx_ring.rx_slot == msg_rx_ring.size)
|
|
msg_rx_ring.rx_slot = 0;
|
|
|
|
out:
|
|
return rc;
|
|
}
|
|
|
|
EXPORT_SYMBOL_GPL(rio_hw_add_inb_buffer);
|
|
|
|
/**
|
|
* rio_hw_get_inb_message - Fetch inbound message from the MPC85xx message unit
|
|
* @mport: Master port implementing the inbound message unit
|
|
* @mbox: Inbound mailbox number
|
|
*
|
|
* Gets the next available inbound message from the inbound message queue.
|
|
* A pointer to the message is returned on success or NULL on failure.
|
|
*/
|
|
void *rio_hw_get_inb_message(struct rio_mport *mport, int mbox)
|
|
{
|
|
u32 imr;
|
|
u32 phys_buf, virt_buf;
|
|
void *buf = NULL;
|
|
int buf_idx;
|
|
|
|
phys_buf = in_be32((void *)&msg_regs->ifqdpar);
|
|
|
|
/* If no more messages, then bail out */
|
|
if (phys_buf == in_be32((void *)&msg_regs->ifqepar))
|
|
goto out2;
|
|
|
|
virt_buf = (u32) msg_rx_ring.virt + (phys_buf - msg_rx_ring.phys);
|
|
buf_idx = (phys_buf - msg_rx_ring.phys) / RIO_MAX_MSG_SIZE;
|
|
buf = msg_rx_ring.virt_buffer[buf_idx];
|
|
|
|
if (!buf) {
|
|
printk(KERN_ERR
|
|
"RIO: inbound message copy failed, no buffers\n");
|
|
goto out1;
|
|
}
|
|
|
|
/* Copy max message size, caller is expected to allocate that big */
|
|
memcpy(buf, (void *)virt_buf, RIO_MAX_MSG_SIZE);
|
|
|
|
/* Clear the available buffer */
|
|
msg_rx_ring.virt_buffer[buf_idx] = NULL;
|
|
|
|
out1:
|
|
imr = in_be32((void *)&msg_regs->imr);
|
|
out_be32((void *)&msg_regs->imr, imr | RIO_MSG_IMR_MI);
|
|
|
|
out2:
|
|
return buf;
|
|
}
|
|
|
|
EXPORT_SYMBOL_GPL(rio_hw_get_inb_message);
|
|
|
|
/**
|
|
* mpc85xx_rio_dbell_handler - MPC85xx doorbell interrupt handler
|
|
* @irq: Linux interrupt number
|
|
* @dev_instance: Pointer to interrupt-specific data
|
|
* @regs: Register context
|
|
*
|
|
* Handles doorbell interrupts. Parses a list of registered
|
|
* doorbell event handlers and executes a matching event handler.
|
|
*/
|
|
static irqreturn_t
|
|
mpc85xx_rio_dbell_handler(int irq, void *dev_instance, struct pt_regs *regs)
|
|
{
|
|
int dsr;
|
|
struct rio_mport *port = (struct rio_mport *)dev_instance;
|
|
|
|
dsr = in_be32((void *)&msg_regs->dsr);
|
|
|
|
if (dsr & DOORBELL_DSR_TE) {
|
|
pr_info("RIO: doorbell reception error\n");
|
|
out_be32((void *)&msg_regs->dsr, DOORBELL_DSR_TE);
|
|
goto out;
|
|
}
|
|
|
|
if (dsr & DOORBELL_DSR_QFI) {
|
|
pr_info("RIO: doorbell queue full\n");
|
|
out_be32((void *)&msg_regs->dsr, DOORBELL_DSR_QFI);
|
|
goto out;
|
|
}
|
|
|
|
/* XXX Need to check/dispatch until queue empty */
|
|
if (dsr & DOORBELL_DSR_DIQI) {
|
|
u32 dmsg =
|
|
(u32) dbell_ring.virt +
|
|
(in_be32((void *)&msg_regs->dqdpar) & 0xfff);
|
|
u32 dmr;
|
|
struct rio_dbell *dbell;
|
|
int found = 0;
|
|
|
|
pr_debug
|
|
("RIO: processing doorbell, sid %2.2x tid %2.2x info %4.4x\n",
|
|
DBELL_SID(dmsg), DBELL_TID(dmsg), DBELL_INF(dmsg));
|
|
|
|
list_for_each_entry(dbell, &port->dbells, node) {
|
|
if ((dbell->res->start <= DBELL_INF(dmsg)) &&
|
|
(dbell->res->end >= DBELL_INF(dmsg))) {
|
|
found = 1;
|
|
break;
|
|
}
|
|
}
|
|
if (found) {
|
|
dbell->dinb(port, dbell->dev_id, DBELL_SID(dmsg), DBELL_TID(dmsg),
|
|
DBELL_INF(dmsg));
|
|
} else {
|
|
pr_debug
|
|
("RIO: spurious doorbell, sid %2.2x tid %2.2x info %4.4x\n",
|
|
DBELL_SID(dmsg), DBELL_TID(dmsg), DBELL_INF(dmsg));
|
|
}
|
|
dmr = in_be32((void *)&msg_regs->dmr);
|
|
out_be32((void *)&msg_regs->dmr, dmr | DOORBELL_DMR_DI);
|
|
out_be32((void *)&msg_regs->dsr, DOORBELL_DSR_DIQI);
|
|
}
|
|
|
|
out:
|
|
return IRQ_HANDLED;
|
|
}
|
|
|
|
/**
|
|
* mpc85xx_rio_doorbell_init - MPC85xx doorbell interface init
|
|
* @mport: Master port implementing the inbound doorbell unit
|
|
*
|
|
* Initializes doorbell unit hardware and inbound DMA buffer
|
|
* ring. Called from mpc85xx_rio_setup(). Returns %0 on success
|
|
* or %-ENOMEM on failure.
|
|
*/
|
|
static int mpc85xx_rio_doorbell_init(struct rio_mport *mport)
|
|
{
|
|
int rc = 0;
|
|
|
|
/* Map outbound doorbell window immediately after maintenance window */
|
|
if (!(dbell_win =
|
|
(u32) ioremap(mport->iores.start + RIO_MAINT_WIN_SIZE,
|
|
RIO_DBELL_WIN_SIZE))) {
|
|
printk(KERN_ERR
|
|
"RIO: unable to map outbound doorbell window\n");
|
|
rc = -ENOMEM;
|
|
goto out;
|
|
}
|
|
|
|
/* Initialize inbound doorbells */
|
|
if (!(dbell_ring.virt = dma_alloc_coherent(NULL,
|
|
512 * DOORBELL_MESSAGE_SIZE,
|
|
&dbell_ring.phys,
|
|
GFP_KERNEL))) {
|
|
printk(KERN_ERR "RIO: unable allocate inbound doorbell ring\n");
|
|
rc = -ENOMEM;
|
|
iounmap((void *)dbell_win);
|
|
goto out;
|
|
}
|
|
|
|
/* Point dequeue/enqueue pointers at first entry in ring */
|
|
out_be32((void *)&msg_regs->dqdpar, (u32) dbell_ring.phys);
|
|
out_be32((void *)&msg_regs->dqepar, (u32) dbell_ring.phys);
|
|
|
|
/* Clear interrupt status */
|
|
out_be32((void *)&msg_regs->dsr, 0x00000091);
|
|
|
|
/* Hook up doorbell handler */
|
|
if ((rc =
|
|
request_irq(MPC85xx_IRQ_RIO_BELL, mpc85xx_rio_dbell_handler, 0,
|
|
"dbell_rx", (void *)mport) < 0)) {
|
|
iounmap((void *)dbell_win);
|
|
dma_free_coherent(NULL, 512 * DOORBELL_MESSAGE_SIZE,
|
|
dbell_ring.virt, dbell_ring.phys);
|
|
printk(KERN_ERR
|
|
"MPC85xx RIO: unable to request inbound doorbell irq");
|
|
goto out;
|
|
}
|
|
|
|
/* Configure doorbells for snooping, 512 entries, and enable */
|
|
out_be32((void *)&msg_regs->dmr, 0x00108161);
|
|
|
|
out:
|
|
return rc;
|
|
}
|
|
|
|
static char *cmdline = NULL;
|
|
|
|
static int mpc85xx_rio_get_hdid(int index)
|
|
{
|
|
/* XXX Need to parse multiple entries in some format */
|
|
if (!cmdline)
|
|
return -1;
|
|
|
|
return simple_strtol(cmdline, NULL, 0);
|
|
}
|
|
|
|
static int mpc85xx_rio_get_cmdline(char *s)
|
|
{
|
|
if (!s)
|
|
return 0;
|
|
|
|
cmdline = s;
|
|
return 1;
|
|
}
|
|
|
|
__setup("riohdid=", mpc85xx_rio_get_cmdline);
|
|
|
|
/**
|
|
* mpc85xx_rio_setup - Setup MPC85xx RapidIO interface
|
|
* @law_start: Starting physical address of RapidIO LAW
|
|
* @law_size: Size of RapidIO LAW
|
|
*
|
|
* Initializes MPC85xx RapidIO hardware interface, configures
|
|
* master port with system-specific info, and registers the
|
|
* master port with the RapidIO subsystem.
|
|
*/
|
|
void mpc85xx_rio_setup(int law_start, int law_size)
|
|
{
|
|
struct rio_ops *ops;
|
|
struct rio_mport *port;
|
|
|
|
ops = kmalloc(sizeof(struct rio_ops), GFP_KERNEL);
|
|
ops->lcread = mpc85xx_local_config_read;
|
|
ops->lcwrite = mpc85xx_local_config_write;
|
|
ops->cread = mpc85xx_rio_config_read;
|
|
ops->cwrite = mpc85xx_rio_config_write;
|
|
ops->dsend = mpc85xx_rio_doorbell_send;
|
|
|
|
port = kmalloc(sizeof(struct rio_mport), GFP_KERNEL);
|
|
port->id = 0;
|
|
port->index = 0;
|
|
INIT_LIST_HEAD(&port->dbells);
|
|
port->iores.start = law_start;
|
|
port->iores.end = law_start + law_size;
|
|
port->iores.flags = IORESOURCE_MEM;
|
|
|
|
rio_init_dbell_res(&port->riores[RIO_DOORBELL_RESOURCE], 0, 0xffff);
|
|
rio_init_mbox_res(&port->riores[RIO_INB_MBOX_RESOURCE], 0, 0);
|
|
rio_init_mbox_res(&port->riores[RIO_OUTB_MBOX_RESOURCE], 0, 0);
|
|
strcpy(port->name, "RIO0 mport");
|
|
|
|
port->ops = ops;
|
|
port->host_deviceid = mpc85xx_rio_get_hdid(port->id);
|
|
|
|
rio_register_mport(port);
|
|
|
|
regs_win = (u32) ioremap(RIO_REGS_BASE, 0x20000);
|
|
atmu_regs = (struct rio_atmu_regs *)(regs_win + RIO_ATMU_REGS_OFFSET);
|
|
maint_atmu_regs = atmu_regs + 1;
|
|
dbell_atmu_regs = atmu_regs + 2;
|
|
msg_regs = (struct rio_msg_regs *)(regs_win + RIO_MSG_REGS_OFFSET);
|
|
|
|
/* Configure maintenance transaction window */
|
|
out_be32((void *)&maint_atmu_regs->rowbar, 0x000c0000);
|
|
out_be32((void *)&maint_atmu_regs->rowar, 0x80077015);
|
|
|
|
maint_win = (u32) ioremap(law_start, RIO_MAINT_WIN_SIZE);
|
|
|
|
/* Configure outbound doorbell window */
|
|
out_be32((void *)&dbell_atmu_regs->rowbar, 0x000c0400);
|
|
out_be32((void *)&dbell_atmu_regs->rowar, 0x8004200b);
|
|
mpc85xx_rio_doorbell_init(port);
|
|
}
|