forked from luck/tmp_suning_uos_patched
585cf17561
The Marvell Orion is a family of ARM SoCs with a DDR/DDR2 memory controller, 10/100/1000 ethernet MAC, and USB 2.0 interfaces, and, depending on the specific model, PCI-E interface, PCI-X interface, SATA controllers, crypto unit, SPI interface, SDIO interface, device bus, NAND controller, DMA engine and/or XOR engine. This contains the basic structure and architecture register definitions. Signed-off-by: Tzachi Perelstein <tzachi@marvell.com> Reviewed-by: Nicolas Pitre <nico@marvell.com> Reviewed-by: Lennert Buytenhek <buytenh@marvell.com> Acked-by: Russell King <rmk+kernel@arm.linux.org.uk>
25 lines
643 B
C
25 lines
643 B
C
/*
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* include/asm-arm/arch-orion/hardware.h
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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*/
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#ifndef __ASM_ARCH_HARDWARE_H__
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#define __ASM_ARCH_HARDWARE_H__
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#include "orion.h"
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#define PCI_MEMORY_VADDR ORION_PCI_SYS_MEM_BASE
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#define PCI_IO_VADDR ORION_PCI_SYS_IO_BASE
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#define pcibios_assign_all_busses() 1
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#define PCIBIOS_MIN_IO 0x1000
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#define PCIBIOS_MIN_MEM 0x01000000
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#define PCIMEM_BASE PCI_MEMORY_VADDR /* mem base for VGA */
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#endif /* _ASM_ARCH_HARDWARE_H */
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