kernel_optimize_test/include/asm-arm/arch-orion/uncompress.h
Tzachi Perelstein 585cf17561 [ARM] basic support for the Marvell Orion SoC family
The Marvell Orion is a family of ARM SoCs with a DDR/DDR2 memory
controller, 10/100/1000 ethernet MAC, and USB 2.0 interfaces,
and, depending on the specific model, PCI-E interface, PCI-X
interface, SATA controllers, crypto unit, SPI interface, SDIO
interface, device bus, NAND controller, DMA engine and/or XOR
engine.

This contains the basic structure and architecture register definitions.

Signed-off-by: Tzachi Perelstein <tzachi@marvell.com>
Reviewed-by: Nicolas Pitre <nico@marvell.com>
Reviewed-by: Lennert Buytenhek <buytenh@marvell.com>
Acked-by: Russell King <rmk+kernel@arm.linux.org.uk>
2008-01-26 15:03:42 +00:00

45 lines
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C

/*
* include/asm-arm/arch-orion/uncompress.h
*
* Tzachi Perelstein <tzachi@marvell.com>
*
* This file is licensed under the terms of the GNU General Public
* License version 2. This program is licensed "as is" without any
* warranty of any kind, whether express or implied.
*/
#include <asm/arch/orion.h>
#define MV_UART_LSR ((volatile unsigned char *)(UART0_BASE + 0x14))
#define MV_UART_THR ((volatile unsigned char *)(UART0_BASE + 0x0))
#define LSR_THRE 0x20
static void putc(const char c)
{
int j = 0x1000;
while (--j && !(*MV_UART_LSR & LSR_THRE))
barrier();
*MV_UART_THR = c;
}
static void flush(void)
{
}
static void orion_early_putstr(const char *ptr)
{
char c;
while ((c = *ptr++) != '\0') {
if (c == '\n')
putc('\r');
putc(c);
}
}
/*
* nothing to do
*/
#define arch_decomp_setup()
#define arch_decomp_wdog()