forked from luck/tmp_suning_uos_patched
ff44b49b55
If the watchdog reset fails and we decided to take the jump to zero approach, allow 50ms for the UARTS to drain the FIFOs before calling into a bootloader that may flush the output. Also reduece the waits and the timeout values as 5 seconds is rather long. Signed-off-by: Ben Dooks <ben-linux@fluff.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
103 lines
2.4 KiB
C
103 lines
2.4 KiB
C
/* linux/include/asm-arm/arch-s3c2410/system.h
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*
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* Copyright (c) 2003 Simtec Electronics
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* Ben Dooks <ben@simtec.co.uk>
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*
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* S3C2410 - System function defines and includes
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#include <asm/hardware.h>
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#include <asm/io.h>
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#include <asm/arch/map.h>
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#include <asm/arch/idle.h>
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#include <asm/arch/reset.h>
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#include <asm/plat-s3c/regs-watchdog.h>
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#include <asm/arch/regs-clock.h>
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#include <linux/clk.h>
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#include <linux/err.h>
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void (*s3c24xx_idle)(void);
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void (*s3c24xx_reset_hook)(void);
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void s3c24xx_default_idle(void)
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{
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unsigned long tmp;
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int i;
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/* idle the system by using the idle mode which will wait for an
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* interrupt to happen before restarting the system.
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*/
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/* Warning: going into idle state upsets jtag scanning */
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__raw_writel(__raw_readl(S3C2410_CLKCON) | S3C2410_CLKCON_IDLE,
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S3C2410_CLKCON);
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/* the samsung port seems to do a loop and then unset idle.. */
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for (i = 0; i < 50; i++) {
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tmp += __raw_readl(S3C2410_CLKCON); /* ensure loop not optimised out */
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}
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/* this bit is not cleared on re-start... */
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__raw_writel(__raw_readl(S3C2410_CLKCON) & ~S3C2410_CLKCON_IDLE,
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S3C2410_CLKCON);
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}
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static void arch_idle(void)
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{
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if (s3c24xx_idle != NULL)
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(s3c24xx_idle)();
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else
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s3c24xx_default_idle();
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}
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static void
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arch_reset(char mode)
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{
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struct clk *wdtclk;
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if (mode == 's') {
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cpu_reset(0);
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}
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if (s3c24xx_reset_hook)
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s3c24xx_reset_hook();
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printk("arch_reset: attempting watchdog reset\n");
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__raw_writel(0, S3C2410_WTCON); /* disable watchdog, to be safe */
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wdtclk = clk_get(NULL, "watchdog");
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if (!IS_ERR(wdtclk)) {
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clk_enable(wdtclk);
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} else
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printk(KERN_WARNING "%s: warning: cannot get watchdog clock\n", __func__);
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/* put initial values into count and data */
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__raw_writel(0x80, S3C2410_WTCNT);
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__raw_writel(0x80, S3C2410_WTDAT);
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/* set the watchdog to go and reset... */
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__raw_writel(S3C2410_WTCON_ENABLE|S3C2410_WTCON_DIV16|S3C2410_WTCON_RSTEN |
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S3C2410_WTCON_PRESCALE(0x20), S3C2410_WTCON);
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/* wait for reset to assert... */
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mdelay(500);
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printk(KERN_ERR "Watchdog reset failed to assert reset\n");
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/* delay to allow the serial port to show the message */
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mdelay(50);
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/* we'll take a jump through zero as a poor second */
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cpu_reset(0);
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}
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