forked from luck/tmp_suning_uos_patched
171bb2f19e
Add initial support for Mips based SoCs made by Lantiq. This series will add support for the XWAY family. The series allows booting a minimal system using a initramfs or NOR. Missing drivers and support for Amazon and GPON family will be provided in a later series. [Ralf: Remove some cargo cult programming and fixed formatting.] Signed-off-by: John Crispin <blogic@openwrt.org> Signed-off-by: Ralph Hempel <ralph.hempel@lantiq.com> Signed-off-by: David Daney <ddaney@caviumnetworks.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/2252/ Patchwork: https://patchwork.linux-mips.org/patch/2371/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
34 lines
888 B
C
34 lines
888 B
C
/*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License version 2 as published
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* by the Free Software Foundation.
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*
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* Copyright (C) 2010 John Crispin <blogic@openwrt.org>
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*/
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#include <linux/init.h>
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#include <linux/cpu.h>
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#include <lantiq.h>
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#include <lantiq_soc.h>
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/* no ioremap possible at this early stage, lets use KSEG1 instead */
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#define LTQ_ASC_BASE KSEG1ADDR(LTQ_ASC1_BASE_ADDR)
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#define ASC_BUF 1024
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#define LTQ_ASC_FSTAT ((u32 *)(LTQ_ASC_BASE + 0x0048))
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#define LTQ_ASC_TBUF ((u32 *)(LTQ_ASC_BASE + 0x0020))
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#define TXMASK 0x3F00
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#define TXOFFSET 8
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void prom_putchar(char c)
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{
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unsigned long flags;
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local_irq_save(flags);
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do { } while ((ltq_r32(LTQ_ASC_FSTAT) & TXMASK) >> TXOFFSET);
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if (c == '\n')
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ltq_w32('\r', LTQ_ASC_TBUF);
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ltq_w32(c, LTQ_ASC_TBUF);
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local_irq_restore(flags);
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}
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