forked from luck/tmp_suning_uos_patched
4d3d0e4272
The Aspeed SoCs typically provide more than 200 pins for GPIO and other functions. The signal enabled on a pin is determined on a priority basis, where a given pin can provide a number of different signal types. In addition to the priority levels, the Aspeed pin controllers describe the signal active on a pin by compound logical expressions involving multiple operators, registers and bits. Some difficulty arises as a pin's function bit masks for each priority level are frequently not the same (i.e. we cannot just flip a bit to change from a high to low priority signal), or even in the same register(s). Some configuration bits affect multiple pins, while in other cases the signals for a bus must each be enabled individually. Together, these features give rise to some complexity in the implementation. A more complete description of the complexities is provided in the associated header file. The patch doesn't implement pinctrl/pinmux/pinconf for any particular Aspeed SoC, rather it adds the framework for defining pinmux configurations. Signed-off-by: Andrew Jeffery <andrew@aj.id.au> Reviewed-by: Joel Stanley <joel@jms.id.au> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
287 lines
6.7 KiB
Plaintext
287 lines
6.7 KiB
Plaintext
#
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# PINCTRL infrastructure and drivers
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#
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config PINCTRL
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bool
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menu "Pin controllers"
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depends on PINCTRL
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config PINMUX
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bool "Support pin multiplexing controllers" if COMPILE_TEST
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config PINCONF
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bool "Support pin configuration controllers" if COMPILE_TEST
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config GENERIC_PINCONF
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bool
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select PINCONF
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config DEBUG_PINCTRL
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bool "Debug PINCTRL calls"
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depends on DEBUG_KERNEL
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help
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Say Y here to add some extra checks and diagnostics to PINCTRL calls.
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config PINCTRL_ADI2
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bool "ADI pin controller driver"
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depends on BLACKFIN
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select PINMUX
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select IRQ_DOMAIN
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help
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This is the pin controller and gpio driver for ADI BF54x, BF60x and
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future processors. This option is selected automatically when specific
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machine and arch are selected to build.
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config PINCTRL_AS3722
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tristate "Pinctrl and GPIO driver for ams AS3722 PMIC"
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depends on MFD_AS3722 && GPIOLIB
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select PINMUX
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select GENERIC_PINCONF
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help
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AS3722 device supports the configuration of GPIO pins for different
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functionality. This driver supports the pinmux, push-pull and
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open drain configuration for the GPIO pins of AS3722 devices. It also
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supports the GPIO functionality through gpiolib.
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config PINCTRL_BF54x
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def_bool y if BF54x
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select PINCTRL_ADI2
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config PINCTRL_BF60x
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def_bool y if BF60x
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select PINCTRL_ADI2
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config PINCTRL_AT91
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bool "AT91 pinctrl driver"
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depends on OF
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depends on ARCH_AT91
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select PINMUX
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select PINCONF
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select GPIOLIB
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select OF_GPIO
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select GPIOLIB_IRQCHIP
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help
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Say Y here to enable the at91 pinctrl driver
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config PINCTRL_AT91PIO4
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bool "AT91 PIO4 pinctrl driver"
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depends on OF
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depends on ARCH_AT91
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select PINMUX
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select GENERIC_PINCONF
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select GPIOLIB
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select GPIOLIB_IRQCHIP
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select OF_GPIO
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help
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Say Y here to enable the at91 pinctrl/gpio driver for Atmel PIO4
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controller available on sama5d2 SoC.
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config PINCTRL_AMD
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tristate "AMD GPIO pin control"
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depends on GPIOLIB
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select GPIOLIB_IRQCHIP
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select PINCONF
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select GENERIC_PINCONF
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help
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driver for memory mapped GPIO functionality on AMD platforms
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(x86 or arm).Most pins are usually muxed to some other
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functionality by firmware,so only a small amount is available
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for gpio use.
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Requires ACPI/FDT device enumeration code to set up a platform
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device.
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config PINCTRL_DIGICOLOR
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bool
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depends on OF && (ARCH_DIGICOLOR || COMPILE_TEST)
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select PINMUX
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select GENERIC_PINCONF
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config PINCTRL_LANTIQ
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bool
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depends on LANTIQ
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select PINMUX
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select PINCONF
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config PINCTRL_LPC18XX
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bool "NXP LPC18XX/43XX SCU pinctrl driver"
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depends on OF && (ARCH_LPC18XX || COMPILE_TEST)
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default ARCH_LPC18XX
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select PINMUX
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select GENERIC_PINCONF
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help
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Pinctrl driver for NXP LPC18xx/43xx System Control Unit (SCU).
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config PINCTRL_FALCON
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bool
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depends on SOC_FALCON
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depends on PINCTRL_LANTIQ
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config PINCTRL_MESON
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bool
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depends on OF
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select PINMUX
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select PINCONF
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select GENERIC_PINCONF
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select GPIOLIB
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select OF_GPIO
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select REGMAP_MMIO
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config PINCTRL_OXNAS
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bool
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depends on OF
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select PINMUX
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select PINCONF
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select GENERIC_PINCONF
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select GPIOLIB
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select OF_GPIO
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select GPIOLIB_IRQCHIP
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select MFD_SYSCON
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config PINCTRL_ROCKCHIP
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bool
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select PINMUX
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select GENERIC_PINCONF
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select GENERIC_IRQ_CHIP
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select MFD_SYSCON
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config PINCTRL_SINGLE
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tristate "One-register-per-pin type device tree based pinctrl driver"
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depends on OF
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select PINMUX
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select PINCONF
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select GENERIC_PINCONF
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help
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This selects the device tree based generic pinctrl driver.
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config PINCTRL_SIRF
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bool "CSR SiRFprimaII pin controller driver"
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depends on ARCH_SIRF
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select PINMUX
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select PINCONF
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select GENERIC_PINCONF
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select GPIOLIB_IRQCHIP
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config PINCTRL_PISTACHIO
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def_bool y if MACH_PISTACHIO
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depends on GPIOLIB
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select PINMUX
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select GENERIC_PINCONF
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select GPIOLIB_IRQCHIP
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select OF_GPIO
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config PINCTRL_ST
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bool
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depends on OF
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select PINMUX
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select PINCONF
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select GPIOLIB_IRQCHIP
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config PINCTRL_TZ1090
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bool "Toumaz Xenif TZ1090 pin control driver"
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depends on SOC_TZ1090
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select PINMUX
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select GENERIC_PINCONF
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config PINCTRL_TZ1090_PDC
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bool "Toumaz Xenif TZ1090 PDC pin control driver"
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depends on SOC_TZ1090
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select PINMUX
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select PINCONF
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config PINCTRL_U300
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bool "U300 pin controller driver"
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depends on ARCH_U300
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select PINMUX
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select GENERIC_PINCONF
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config PINCTRL_COH901
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bool "ST-Ericsson U300 COH 901 335/571 GPIO"
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depends on GPIOLIB && ARCH_U300 && PINCTRL_U300
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select GPIOLIB_IRQCHIP
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help
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Say yes here to support GPIO interface on ST-Ericsson U300.
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The names of the two IP block variants supported are
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COH 901 335 and COH 901 571/3. They contain 3, 5 or 7
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ports of 8 GPIO pins each.
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config PINCTRL_MAX77620
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tristate "MAX77620/MAX20024 Pincontrol support"
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depends on MFD_MAX77620
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select PINMUX
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select GENERIC_PINCONF
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help
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Say Yes here to enable Pin control support for Maxim PMIC MAX77620.
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This PMIC has 8 GPIO pins that work as GPIO as well as special
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function in alternate mode. This driver also configure push-pull,
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open drain, FPS slots etc.
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config PINCTRL_PALMAS
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tristate "Pinctrl driver for the PALMAS Series MFD devices"
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depends on OF && MFD_PALMAS
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select PINMUX
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select GENERIC_PINCONF
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help
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Palmas device supports the configuration of pins for different
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functionality. This driver supports the pinmux, push-pull and
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open drain configuration for the Palmas series devices like
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TPS65913, TPS80036 etc.
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config PINCTRL_PIC32
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bool "Microchip PIC32 pin controller driver"
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depends on OF
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depends on MACH_PIC32
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select PINMUX
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select GENERIC_PINCONF
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select GPIOLIB_IRQCHIP
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select OF_GPIO
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help
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This is the pin controller and gpio driver for Microchip PIC32
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microcontrollers. This option is selected automatically when specific
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machine and arch are selected to build.
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config PINCTRL_PIC32MZDA
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def_bool y if PIC32MZDA
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select PINCTRL_PIC32
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config PINCTRL_ZYNQ
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bool "Pinctrl driver for Xilinx Zynq"
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depends on ARCH_ZYNQ
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select PINMUX
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select GENERIC_PINCONF
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help
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This selects the pinctrl driver for Xilinx Zynq.
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source "drivers/pinctrl/aspeed/Kconfig"
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source "drivers/pinctrl/bcm/Kconfig"
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source "drivers/pinctrl/berlin/Kconfig"
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source "drivers/pinctrl/freescale/Kconfig"
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source "drivers/pinctrl/intel/Kconfig"
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source "drivers/pinctrl/mvebu/Kconfig"
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source "drivers/pinctrl/nomadik/Kconfig"
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source "drivers/pinctrl/pxa/Kconfig"
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source "drivers/pinctrl/qcom/Kconfig"
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source "drivers/pinctrl/samsung/Kconfig"
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source "drivers/pinctrl/sh-pfc/Kconfig"
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source "drivers/pinctrl/spear/Kconfig"
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source "drivers/pinctrl/stm32/Kconfig"
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source "drivers/pinctrl/sunxi/Kconfig"
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source "drivers/pinctrl/tegra/Kconfig"
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source "drivers/pinctrl/uniphier/Kconfig"
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source "drivers/pinctrl/vt8500/Kconfig"
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source "drivers/pinctrl/mediatek/Kconfig"
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config PINCTRL_XWAY
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bool
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depends on SOC_TYPE_XWAY
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depends on PINCTRL_LANTIQ
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config PINCTRL_TB10X
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bool
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depends on OF && ARC_PLAT_TB10X
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select GPIOLIB
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endmenu
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