forked from luck/tmp_suning_uos_patched
8deab1144b
This is an update to the earlier patch for the sibyte headers, and superceeds the previous patch. Changes were necessary to get the tbprof driver working on the bcm1480. Patch to update Sibyte header files to match master versions maintained at Broadcom. This patch also corrects some whitespace problems, and (hopefully) shouldn't introduce any new ones. Signed-off-by: Mark Mason <mason@broadcom.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
59 lines
1.9 KiB
C
59 lines
1.9 KiB
C
/*
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* Copyright (C) 2002 Broadcom Corporation
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation; either version 2
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* of the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
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*/
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#ifndef __ASM_SIBYTE_CARMEL_H
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#define __ASM_SIBYTE_CARMEL_H
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#include <asm/sibyte/sb1250.h>
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#include <asm/sibyte/sb1250_int.h>
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#define SIBYTE_BOARD_NAME "Carmel"
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#define GPIO_PHY_INTERRUPT 2
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#define GPIO_NONMASKABLE_INT 3
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#define GPIO_CF_INSERTED 6
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#define GPIO_MONTEREY_RESET 7
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#define GPIO_QUADUART_INT 8
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#define GPIO_CF_INT 9
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#define GPIO_FPGA_CCLK 10
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#define GPIO_FPGA_DOUT 11
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#define GPIO_FPGA_DIN 12
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#define GPIO_FPGA_PGM 13
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#define GPIO_FPGA_DONE 14
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#define GPIO_FPGA_INIT 15
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#define LEDS_CS 2
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#define LEDS_PHYS 0x100C0000
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#define MLEDS_CS 3
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#define MLEDS_PHYS 0x100A0000
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#define UART_CS 4
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#define UART_PHYS 0x100D0000
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#define ARAVALI_CS 5
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#define ARAVALI_PHYS 0x11000000
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#define IDE_CS 6
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#define IDE_PHYS 0x100B0000
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#define ARAVALI2_CS 7
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#define ARAVALI2_PHYS 0x100E0000
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#if defined(CONFIG_SIBYTE_CARMEL)
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#define K_GPIO_GB_IDE 9
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#define K_INT_GB_IDE (K_INT_GPIO_0 + K_GPIO_GB_IDE)
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#endif
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#endif /* __ASM_SIBYTE_CARMEL_H */
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