forked from luck/tmp_suning_uos_patched
775b8ae870
Add a power domain workaround for the VPU and A3RV on sh7372. The sh7372 data sheet mentions that the VPU is located in the A3RV power domain. The A3RV power domain is not related to A4LC in any way, but testing shows that unless A3RV _and_ A4LC are powered on the VPU test program will bomb out. This issue may be caused by a more or less undocumented dependency on the MERAM block that happens to be located in A4LC. So now we know that the out-of-reset requirement of the VPU is that the MERAM is powered on. This patch adds a workaround for A3RV to make sure A4LC is powered on - this so we can use the VPU even though the LCDCs are in blanking state and A4LC is supposed to be off. Signed-off-by: Magnus Damm <damm@opensource.se> Signed-off-by: Rafael J. Wysocki <rjw@sisk.pl> |
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| alpha | ||
| arm | ||
| avr32 | ||
| blackfin | ||
| cris | ||
| frv | ||
| h8300 | ||
| ia64 | ||
| m32r | ||
| m68k | ||
| microblaze | ||
| mips | ||
| mn10300 | ||
| parisc | ||
| powerpc | ||
| s390 | ||
| score | ||
| sh | ||
| sparc | ||
| tile | ||
| um | ||
| unicore32 | ||
| x86 | ||
| xtensa | ||
| .gitignore | ||
| Kconfig | ||