forked from luck/tmp_suning_uos_patched
64b70da038
Based on 1 normalized pattern(s): this program is free software you can redistribute it and or modify it under the terms of the gnu general public license as published by the free software foundation either version 2 or at your option any later version this program is distributed in the hope that it will be useful but without any warranties or representations without even the implied warranty of merchantability or fitness for a particular purpose see the gnu general public license for more details you should have received a copy of the gnu general public license along with this program if not write to the free software foundation inc 59 temple place suite 330 boston ma 02111 1307 usa extracted by the scancode license scanner the SPDX license identifier GPL-2.0-or-later has been chosen to replace the boilerplate/reference in 43 file(s). Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Reviewed-by: Allison Randal <allison@lohutok.net> Reviewed-by: Kate Stewart <kstewart@linuxfoundation.org> Cc: linux-spdx@vger.kernel.org Link: https://lkml.kernel.org/r/20190520170858.826676366@linutronix.de Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
222 lines
6.6 KiB
C
222 lines
6.6 KiB
C
/* SPDX-License-Identifier: GPL-2.0-or-later */
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/*
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* Copyright 1998-2009 VIA Technologies, Inc. All Rights Reserved.
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* Copyright 2001-2008 S3 Graphics, Inc. All Rights Reserved.
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* Copyright 2009-2010 Jonathan Corbet <corbet@lwn.net>
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* Copyright 2010 Florian Tobias Schandinat <FlorianSchandinat@gmx.de>
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*/
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#ifndef __VIA_CORE_H__
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#define __VIA_CORE_H__
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#include <linux/types.h>
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#include <linux/io.h>
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#include <linux/spinlock.h>
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#include <linux/pci.h>
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/*
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* A description of each known serial I2C/GPIO port.
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*/
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enum via_port_type {
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VIA_PORT_NONE = 0,
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VIA_PORT_I2C,
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VIA_PORT_GPIO,
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};
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enum via_port_mode {
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VIA_MODE_OFF = 0,
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VIA_MODE_I2C, /* Used as I2C port */
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VIA_MODE_GPIO, /* Two GPIO ports */
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};
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enum viafb_i2c_adap {
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VIA_PORT_26 = 0,
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VIA_PORT_31,
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VIA_PORT_25,
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VIA_PORT_2C,
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VIA_PORT_3D,
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};
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#define VIAFB_NUM_PORTS 5
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struct via_port_cfg {
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enum via_port_type type;
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enum via_port_mode mode;
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u16 io_port;
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u8 ioport_index;
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};
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/*
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* Allow subdevs to register suspend/resume hooks.
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*/
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#ifdef CONFIG_PM
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struct viafb_pm_hooks {
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struct list_head list;
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int (*suspend)(void *private);
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int (*resume)(void *private);
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void *private;
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};
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void viafb_pm_register(struct viafb_pm_hooks *hooks);
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void viafb_pm_unregister(struct viafb_pm_hooks *hooks);
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#endif /* CONFIG_PM */
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/*
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* This is the global viafb "device" containing stuff needed by
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* all subdevs.
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*/
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struct viafb_dev {
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struct pci_dev *pdev;
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int chip_type;
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struct via_port_cfg *port_cfg;
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/*
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* Spinlock for access to device registers. Not yet
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* globally used.
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*/
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spinlock_t reg_lock;
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/*
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* The framebuffer MMIO region. Little, if anything, touches
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* this memory directly, and certainly nothing outside of the
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* framebuffer device itself. We *do* have to be able to allocate
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* chunks of this memory for other devices, though.
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*/
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unsigned long fbmem_start;
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long fbmem_len;
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void __iomem *fbmem;
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#if defined(CONFIG_VIDEO_VIA_CAMERA) || defined(CONFIG_VIDEO_VIA_CAMERA_MODULE)
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long camera_fbmem_offset;
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long camera_fbmem_size;
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#endif
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/*
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* The MMIO region for device registers.
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*/
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unsigned long engine_start;
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unsigned long engine_len;
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void __iomem *engine_mmio;
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};
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/*
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* Interrupt management.
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*/
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void viafb_irq_enable(u32 mask);
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void viafb_irq_disable(u32 mask);
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/*
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* The global interrupt control register and its bits.
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*/
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#define VDE_INTERRUPT 0x200 /* Video interrupt flags/masks */
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#define VDE_I_DVISENSE 0x00000001 /* DVI sense int status */
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#define VDE_I_VBLANK 0x00000002 /* Vertical blank status */
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#define VDE_I_MCCFI 0x00000004 /* MCE compl. frame int status */
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#define VDE_I_VSYNC 0x00000008 /* VGA VSYNC int status */
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#define VDE_I_DMA0DDONE 0x00000010 /* DMA 0 descr done */
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#define VDE_I_DMA0TDONE 0x00000020 /* DMA 0 transfer done */
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#define VDE_I_DMA1DDONE 0x00000040 /* DMA 1 descr done */
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#define VDE_I_DMA1TDONE 0x00000080 /* DMA 1 transfer done */
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#define VDE_I_C1AV 0x00000100 /* Cap Eng 1 act vid end */
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#define VDE_I_HQV0 0x00000200 /* First HQV engine */
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#define VDE_I_HQV1 0x00000400 /* Second HQV engine */
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#define VDE_I_HQV1EN 0x00000800 /* Second HQV engine enable */
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#define VDE_I_C0AV 0x00001000 /* Cap Eng 0 act vid end */
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#define VDE_I_C0VBI 0x00002000 /* Cap Eng 0 VBI end */
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#define VDE_I_C1VBI 0x00004000 /* Cap Eng 1 VBI end */
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#define VDE_I_VSYNC2 0x00008000 /* Sec. Disp. VSYNC */
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#define VDE_I_DVISNSEN 0x00010000 /* DVI sense enable */
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#define VDE_I_VSYNC2EN 0x00020000 /* Sec Disp VSYNC enable */
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#define VDE_I_MCCFIEN 0x00040000 /* MC comp frame int mask enable */
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#define VDE_I_VSYNCEN 0x00080000 /* VSYNC enable */
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#define VDE_I_DMA0DDEN 0x00100000 /* DMA 0 descr done enable */
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#define VDE_I_DMA0TDEN 0x00200000 /* DMA 0 trans done enable */
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#define VDE_I_DMA1DDEN 0x00400000 /* DMA 1 descr done enable */
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#define VDE_I_DMA1TDEN 0x00800000 /* DMA 1 trans done enable */
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#define VDE_I_C1AVEN 0x01000000 /* cap 1 act vid end enable */
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#define VDE_I_HQV0EN 0x02000000 /* First hqv engine enable */
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#define VDE_I_C1VBIEN 0x04000000 /* Cap 1 VBI end enable */
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#define VDE_I_LVDSSI 0x08000000 /* LVDS sense interrupt */
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#define VDE_I_C0AVEN 0x10000000 /* Cap 0 act vid end enable */
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#define VDE_I_C0VBIEN 0x20000000 /* Cap 0 VBI end enable */
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#define VDE_I_LVDSSIEN 0x40000000 /* LVDS Sense enable */
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#define VDE_I_ENABLE 0x80000000 /* Global interrupt enable */
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#if defined(CONFIG_VIDEO_VIA_CAMERA) || defined(CONFIG_VIDEO_VIA_CAMERA_MODULE)
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/*
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* DMA management.
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*/
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int viafb_request_dma(void);
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void viafb_release_dma(void);
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/* void viafb_dma_copy_out(unsigned int offset, dma_addr_t paddr, int len); */
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int viafb_dma_copy_out_sg(unsigned int offset, struct scatterlist *sg, int nsg);
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/*
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* DMA Controller registers.
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*/
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#define VDMA_MR0 0xe00 /* Mod reg 0 */
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#define VDMA_MR_CHAIN 0x01 /* Chaining mode */
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#define VDMA_MR_TDIE 0x02 /* Transfer done int enable */
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#define VDMA_CSR0 0xe04 /* Control/status */
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#define VDMA_C_ENABLE 0x01 /* DMA Enable */
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#define VDMA_C_START 0x02 /* Start a transfer */
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#define VDMA_C_ABORT 0x04 /* Abort a transfer */
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#define VDMA_C_DONE 0x08 /* Transfer is done */
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#define VDMA_MARL0 0xe20 /* Mem addr low */
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#define VDMA_MARH0 0xe24 /* Mem addr high */
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#define VDMA_DAR0 0xe28 /* Device address */
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#define VDMA_DQWCR0 0xe2c /* Count (16-byte) */
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#define VDMA_TMR0 0xe30 /* Tile mode reg */
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#define VDMA_DPRL0 0xe34 /* Not sure */
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#define VDMA_DPR_IN 0x08 /* Inbound transfer to FB */
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#define VDMA_DPRH0 0xe38
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#define VDMA_PMR0 (0xe00 + 0x134) /* Pitch mode */
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/*
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* Useful stuff that probably belongs somewhere global.
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*/
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#define VGA_WIDTH 640
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#define VGA_HEIGHT 480
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#endif /* CONFIG_VIDEO_VIA_CAMERA */
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/*
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* Indexed port operations. Note that these are all multi-op
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* functions; every invocation will be racy if you're not holding
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* reg_lock.
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*/
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#define VIAStatus 0x3DA /* Non-indexed port */
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#define VIACR 0x3D4
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#define VIASR 0x3C4
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#define VIAGR 0x3CE
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#define VIAAR 0x3C0
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static inline u8 via_read_reg(u16 port, u8 index)
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{
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outb(index, port);
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return inb(port + 1);
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}
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static inline void via_write_reg(u16 port, u8 index, u8 data)
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{
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outb(index, port);
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outb(data, port + 1);
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}
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static inline void via_write_reg_mask(u16 port, u8 index, u8 data, u8 mask)
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{
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u8 old;
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outb(index, port);
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old = inb(port + 1);
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outb((data & mask) | (old & ~mask), port + 1);
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}
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#define VIA_MISC_REG_READ 0x03CC
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#define VIA_MISC_REG_WRITE 0x03C2
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static inline void via_write_misc_reg_mask(u8 data, u8 mask)
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{
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u8 old = inb(VIA_MISC_REG_READ);
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outb((data & mask) | (old & ~mask), VIA_MISC_REG_WRITE);
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}
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#endif /* __VIA_CORE_H__ */
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