forked from luck/tmp_suning_uos_patched
151 lines
3.8 KiB
C
151 lines
3.8 KiB
C
/*
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* include/asm-sh/dma.h
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*
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* Copyright (C) 2003, 2004 Paul Mundt
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*
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* This file is subject to the terms and conditions of the GNU General Public
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* License. See the file "COPYING" in the main directory of this archive
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* for more details.
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*/
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#ifndef __ASM_SH_DMA_H
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#define __ASM_SH_DMA_H
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#ifdef __KERNEL__
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#include <linux/spinlock.h>
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#include <linux/wait.h>
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#include <linux/sysdev.h>
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#include <linux/device.h>
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#include <asm/cpu/dma.h>
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#include <asm/semaphore.h>
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/* The maximum address that we can perform a DMA transfer to on this platform */
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/* Don't define MAX_DMA_ADDRESS; it's useless on the SuperH and any
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occurrence should be flagged as an error. */
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/* But... */
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/* XXX: This is not applicable to SuperH, just needed for alloc_bootmem */
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#define MAX_DMA_ADDRESS (PAGE_OFFSET+0x10000000)
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#ifdef CONFIG_NR_DMA_CHANNELS
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# define MAX_DMA_CHANNELS (CONFIG_NR_DMA_CHANNELS)
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#else
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# define MAX_DMA_CHANNELS (CONFIG_NR_ONCHIP_DMA_CHANNELS)
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#endif
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/*
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* Read and write modes can mean drastically different things depending on the
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* channel configuration. Consult your DMAC documentation and module
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* implementation for further clues.
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*/
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#define DMA_MODE_READ 0x00
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#define DMA_MODE_WRITE 0x01
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#define DMA_MODE_MASK 0x01
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#define DMA_AUTOINIT 0x10
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/*
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* DMAC (dma_info) flags
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*/
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enum {
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DMAC_CHANNELS_CONFIGURED = 0x00,
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DMAC_CHANNELS_TEI_CAPABLE = 0x01,
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};
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/*
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* DMA channel capabilities / flags
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*/
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enum {
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DMA_TEI_CAPABLE = 0x01,
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DMA_CONFIGURED = 0x02,
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};
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extern spinlock_t dma_spin_lock;
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struct dma_channel;
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struct dma_ops {
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int (*request)(struct dma_channel *chan);
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void (*free)(struct dma_channel *chan);
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int (*get_residue)(struct dma_channel *chan);
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int (*xfer)(struct dma_channel *chan);
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void (*configure)(struct dma_channel *chan, unsigned long flags);
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};
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struct dma_channel {
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char dev_id[16];
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unsigned int chan; /* Physical channel number */
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unsigned int vchan; /* Virtual channel number */
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unsigned int mode;
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unsigned int count;
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unsigned long sar;
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unsigned long dar;
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unsigned long flags;
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atomic_t busy;
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struct semaphore sem;
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wait_queue_head_t wait_queue;
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struct sys_device dev;
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};
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struct dma_info {
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struct platform_device *pdev;
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const char *name;
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unsigned int nr_channels;
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unsigned long flags;
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struct dma_ops *ops;
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struct dma_channel *channels;
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struct list_head list;
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};
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#define to_dma_channel(channel) container_of(channel, struct dma_channel, dev)
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/* arch/sh/drivers/dma/dma-api.c */
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extern int dma_xfer(unsigned int chan, unsigned long from,
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unsigned long to, size_t size, unsigned int mode);
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#define dma_write(chan, from, to, size) \
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dma_xfer(chan, from, to, size, DMA_MODE_WRITE)
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#define dma_write_page(chan, from, to) \
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dma_write(chan, from, to, PAGE_SIZE)
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#define dma_read(chan, from, to, size) \
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dma_xfer(chan, from, to, size, DMA_MODE_READ)
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#define dma_read_page(chan, from, to) \
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dma_read(chan, from, to, PAGE_SIZE)
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extern int request_dma(unsigned int chan, const char *dev_id);
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extern void free_dma(unsigned int chan);
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extern int get_dma_residue(unsigned int chan);
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extern struct dma_info *get_dma_info(unsigned int chan);
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extern struct dma_channel *get_dma_channel(unsigned int chan);
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extern void dma_wait_for_completion(unsigned int chan);
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extern void dma_configure_channel(unsigned int chan, unsigned long flags);
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extern int register_dmac(struct dma_info *info);
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extern void unregister_dmac(struct dma_info *info);
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#ifdef CONFIG_SYSFS
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/* arch/sh/drivers/dma/dma-sysfs.c */
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extern int dma_create_sysfs_files(struct dma_channel *, struct dma_info *);
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extern void dma_remove_sysfs_files(struct dma_channel *, struct dma_info *);
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#else
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#define dma_create_sysfs_file(channel, info) do { } while (0)
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#define dma_remove_sysfs_file(channel, info) do { } while (0)
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#endif
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#ifdef CONFIG_PCI
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extern int isa_dma_bridge_buggy;
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#else
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#define isa_dma_bridge_buggy (0)
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#endif
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#endif /* __KERNEL__ */
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#endif /* __ASM_SH_DMA_H */
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