forked from luck/tmp_suning_uos_patched
2d7945100b
The Allwinner A31 is a quad-Cortex-A7 based SoC, which shares a lot of IPs with the previous SoCs from Allwinner, like the PIO, I2C, UARTs, timers, watchdog IPs, but also differs by dropping the WEMAC ethernet controller and most notably dropping the in-house IRQ controller in favor of a ARM GIC one. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
15 lines
311 B
Plaintext
15 lines
311 B
Plaintext
config ARCH_SUNXI
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bool "Allwinner A1X SOCs" if ARCH_MULTI_V7
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select ARCH_REQUIRE_GPIOLIB
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select CLKSRC_MMIO
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select CLKSRC_OF
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select COMMON_CLK
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select GENERIC_CLOCKEVENTS
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select GENERIC_IRQ_CHIP
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select PINCTRL
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select SPARSE_IRQ
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select SUN4I_TIMER
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select PINCTRL_SUNXI
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select ARM_GIC
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select HAVE_SMP
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