forked from luck/tmp_suning_uos_patched
545b0a746b
Per the Intel 915G/915GV/... Chipset spec (document number 301467-005), GMADR is a standard PCI BAR. The PCI core reads GMADR at enumeration-time. Use pci_bus_address() instead of reading it again in the driver. This works correctly for both 32-bit and 64-bit BARs. The spec above only mentions 32-bit GMADR, but Yinghai's patch (link below) indicates some devices have a 64-bit GMADR. [bhelgaas: reworked starting from http://lkml.kernel.org/r/1385851238-21085-13-git-send-email-yinghai@kernel.org] Signed-off-by: Yinghai Lu <yinghai@kernel.org> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch> |
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.. | ||
agp | ||
hw_random | ||
ipmi | ||
mwave | ||
pcmcia | ||
tpm | ||
xilinx_hwicap | ||
apm-emulation.c | ||
applicom.c | ||
applicom.h | ||
bfin-otp.c | ||
bsr.c | ||
ds1302.c | ||
ds1620.c | ||
dsp56k.c | ||
dtlk.c | ||
efirtc.c | ||
generic_nvram.c | ||
genrtc.c | ||
hangcheck-timer.c | ||
hpet.c | ||
i8k.c | ||
Kconfig | ||
lp.c | ||
Makefile | ||
mbcs.c | ||
mbcs.h | ||
mem.c | ||
misc.c | ||
mmtimer.c | ||
msm_smd_pkt.c | ||
mspec.c | ||
nsc_gpio.c | ||
nvram.c | ||
nwbutton.c | ||
nwbutton.h | ||
nwflash.c | ||
pc8736x_gpio.c | ||
ppdev.c | ||
ps3flash.c | ||
random.c | ||
raw.c | ||
rtc.c | ||
scx200_gpio.c | ||
snsc_event.c | ||
snsc.c | ||
snsc.h | ||
sonypi.c | ||
tb0219.c | ||
tile-srom.c | ||
tlclk.c | ||
toshiba.c | ||
ttyprintk.c | ||
uv_mmtimer.c | ||
virtio_console.c |