Andi Kleen ddb25f9ac1 x86: don't disable TSC in any C states on AMD Fam10h ... The ACPI code currently disables TSC use in any C2 and C3 states. But the AMD Fam10h BKDG documents that the TSC will never stop in any C states when the CONSTANT_TSC bit is set. Make this disabling conditional on CONSTANT_TSC not set on AMD. I actually think this is true on Intel too for C2 states on CPUs with p-state invariant TSC, but this needs further discussions with Len to really confirm :-) So far it is only enabled on AMD. Cc: lenb@kernel.org Signed-off-by: Andi Kleen <ak@suse.de> Signed-off-by: Ingo Molnar <mingo@elte.hu> Signed-off-by: Thomas Gleixner <tglx@linutronix.de>		2008-01-30 13:32:41 +01:00
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dispatcher
events
executer
hardware
namespace
parser
resources
sleep
tables
utilities
ac.c
acpi_memhotplug.c
asus_acpi.c
battery.c
bay.c
blacklist.c
bus.c
button.c
cm_sbs.c
container.c
debug.c
dock.c
ec.c
event.c
fan.c
glue.c
Kconfig
Makefile
numa.c
osl.c
pci_bind.c
pci_irq.c
pci_link.c
pci_root.c
power.c
processor_core.c
processor_idle.c
processor_perflib.c
processor_thermal.c
processor_throttling.c
sbs.c
sbshc.c
sbshc.h
scan.c
system.c
tables.c
thermal.c
toshiba_acpi.c
utils.c
video.c