forked from luck/tmp_suning_uos_patched
5cdede2408
This patch moves the relevant declarations from the local header file in drivers/pci to a more accessible locations so that it can be used by the AMD IOMMU driver too. The file is named pci-ats.h because support for the PCI PRI capability will also be added there in a later patch-set. Signed-off-by: Joerg Roedel <joerg.roedel@amd.com> Acked-by: Jesse Barnes <jbarnes@virtuousgeek.org>
53 lines
1.1 KiB
C
53 lines
1.1 KiB
C
#ifndef LINUX_PCI_ATS_H
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#define LINUX_PCI_ATS_H
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/* Address Translation Service */
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struct pci_ats {
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int pos; /* capability position */
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int stu; /* Smallest Translation Unit */
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int qdep; /* Invalidate Queue Depth */
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int ref_cnt; /* Physical Function reference count */
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unsigned int is_enabled:1; /* Enable bit is set */
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};
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#ifdef CONFIG_PCI_IOV
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extern int pci_enable_ats(struct pci_dev *dev, int ps);
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extern void pci_disable_ats(struct pci_dev *dev);
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extern int pci_ats_queue_depth(struct pci_dev *dev);
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/**
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* pci_ats_enabled - query the ATS status
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* @dev: the PCI device
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*
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* Returns 1 if ATS capability is enabled, or 0 if not.
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*/
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static inline int pci_ats_enabled(struct pci_dev *dev)
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{
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return dev->ats && dev->ats->is_enabled;
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}
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#else /* CONFIG_PCI_IOV */
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static inline int pci_enable_ats(struct pci_dev *dev, int ps)
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{
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return -ENODEV;
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}
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static inline void pci_disable_ats(struct pci_dev *dev)
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{
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}
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static inline int pci_ats_queue_depth(struct pci_dev *dev)
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{
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return -ENODEV;
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}
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static inline int pci_ats_enabled(struct pci_dev *dev)
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{
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return 0;
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}
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#endif /* CONFIG_PCI_IOV */
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#endif /* LINUX_PCI_ATS_H*/
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