forked from luck/tmp_suning_uos_patched
8c0b8139c8
The LL/SC and IRQ versions were using generic stubs while the GRB version was just reimplementing what it already had for the standard cmpxchg() code. As we have optimized cmpxchg() implementations that are decoupled from the atomic code, simply falling back on the generic wrapper does the right thing. With this in place the GRB case is unaffected while the LL/SC case gets to use its optimized cmpxchg(). Signed-off-by: Paul Mundt <lethal@linux-sh.org>
124 lines
3.5 KiB
C
124 lines
3.5 KiB
C
#ifndef __ASM_SH_ATOMIC_GRB_H
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#define __ASM_SH_ATOMIC_GRB_H
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static inline void atomic_add(int i, atomic_t *v)
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{
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int tmp;
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__asm__ __volatile__ (
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" .align 2 \n\t"
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" mova 1f, r0 \n\t" /* r0 = end point */
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" mov r15, r1 \n\t" /* r1 = saved sp */
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" mov #-6, r15 \n\t" /* LOGIN: r15 = size */
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" mov.l @%1, %0 \n\t" /* load old value */
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" add %2, %0 \n\t" /* add */
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" mov.l %0, @%1 \n\t" /* store new value */
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"1: mov r1, r15 \n\t" /* LOGOUT */
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: "=&r" (tmp),
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"+r" (v)
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: "r" (i)
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: "memory" , "r0", "r1");
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}
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static inline void atomic_sub(int i, atomic_t *v)
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{
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int tmp;
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__asm__ __volatile__ (
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" .align 2 \n\t"
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" mova 1f, r0 \n\t" /* r0 = end point */
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" mov r15, r1 \n\t" /* r1 = saved sp */
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" mov #-6, r15 \n\t" /* LOGIN: r15 = size */
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" mov.l @%1, %0 \n\t" /* load old value */
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" sub %2, %0 \n\t" /* sub */
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" mov.l %0, @%1 \n\t" /* store new value */
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"1: mov r1, r15 \n\t" /* LOGOUT */
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: "=&r" (tmp),
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"+r" (v)
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: "r" (i)
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: "memory" , "r0", "r1");
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}
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static inline int atomic_add_return(int i, atomic_t *v)
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{
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int tmp;
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__asm__ __volatile__ (
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" .align 2 \n\t"
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" mova 1f, r0 \n\t" /* r0 = end point */
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" mov r15, r1 \n\t" /* r1 = saved sp */
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" mov #-6, r15 \n\t" /* LOGIN: r15 = size */
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" mov.l @%1, %0 \n\t" /* load old value */
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" add %2, %0 \n\t" /* add */
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" mov.l %0, @%1 \n\t" /* store new value */
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"1: mov r1, r15 \n\t" /* LOGOUT */
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: "=&r" (tmp),
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"+r" (v)
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: "r" (i)
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: "memory" , "r0", "r1");
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return tmp;
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}
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static inline int atomic_sub_return(int i, atomic_t *v)
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{
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int tmp;
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__asm__ __volatile__ (
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" .align 2 \n\t"
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" mova 1f, r0 \n\t" /* r0 = end point */
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" mov r15, r1 \n\t" /* r1 = saved sp */
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" mov #-6, r15 \n\t" /* LOGIN: r15 = size */
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" mov.l @%1, %0 \n\t" /* load old value */
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" sub %2, %0 \n\t" /* sub */
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" mov.l %0, @%1 \n\t" /* store new value */
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"1: mov r1, r15 \n\t" /* LOGOUT */
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: "=&r" (tmp),
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"+r" (v)
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: "r" (i)
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: "memory", "r0", "r1");
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return tmp;
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}
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static inline void atomic_clear_mask(unsigned int mask, atomic_t *v)
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{
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int tmp;
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unsigned int _mask = ~mask;
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__asm__ __volatile__ (
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" .align 2 \n\t"
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" mova 1f, r0 \n\t" /* r0 = end point */
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" mov r15, r1 \n\t" /* r1 = saved sp */
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" mov #-6, r15 \n\t" /* LOGIN: r15 = size */
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" mov.l @%1, %0 \n\t" /* load old value */
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" and %2, %0 \n\t" /* add */
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" mov.l %0, @%1 \n\t" /* store new value */
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"1: mov r1, r15 \n\t" /* LOGOUT */
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: "=&r" (tmp),
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"+r" (v)
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: "r" (_mask)
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: "memory" , "r0", "r1");
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}
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static inline void atomic_set_mask(unsigned int mask, atomic_t *v)
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{
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int tmp;
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__asm__ __volatile__ (
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" .align 2 \n\t"
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" mova 1f, r0 \n\t" /* r0 = end point */
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" mov r15, r1 \n\t" /* r1 = saved sp */
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" mov #-6, r15 \n\t" /* LOGIN: r15 = size */
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" mov.l @%1, %0 \n\t" /* load old value */
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" or %2, %0 \n\t" /* or */
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" mov.l %0, @%1 \n\t" /* store new value */
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"1: mov r1, r15 \n\t" /* LOGOUT */
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: "=&r" (tmp),
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"+r" (v)
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: "r" (mask)
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: "memory" , "r0", "r1");
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}
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#endif /* __ASM_SH_ATOMIC_GRB_H */
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