kernel_optimize_test/tools/perf/pmu-events
Mamatha Inamdar c3b4d5c4af perf vendor events: Remove P8 HW events which are not supported
This patch is to remove following hardware events from JSON file which
are not supported on POWER8.

  pm_co_disp_fail
  pm_co_tm_sc_footprint
  pm_iside_disp
  pm_iside_disp_fail
  pm_iside_disp_fail_other
  pm_iside_mru_touch
  pm_l2_castout_mod
  pm_l2_castout_shr
  pm_l2_dc_inv
  pm_l2_disp_all_l2miss
  pm_l2_grp_guess_correct
  pm_l2_grp_guess_wrong
  pm_l2_ic_inv
  pm_l2_inst
  pm_l2_inst_miss
  pm_l2_ld
  pm_l2_ld_disp
  pm_l2_ld_hit
  pm_l2_ld_miss
  pm_l2_loc_guess_correct
  pm_l2_loc_guess_wrong
  pm_l2_rcld_disp
  pm_l2_rcld_disp_fail_addr
  pm_l2_rcld_disp_fail_other
  pm_l2_rcst_disp
  pm_l2_rcst_disp_fail_addr
  pm_l2_rcst_disp_fail_other
  pm_l2_rc_st_done
  pm_l2_rty_ld
  pm_l2_sn_m_rd_done
  pm_l2_sn_m_wr_done
  pm_l2_sn_sx_i_done
  pm_l2_st_disp
  pm_l2_st_hit
  pm_l2_sys_guess_correct
  pm_l2_sys_guess_wrong
  pm_l2_sys_pump
  pm_l3_ci_hit
  pm_l3_ci_miss
  pm_l3_cinj
  pm_l3_co
  pm_l3_co_lco
  pm_l3_grp_guess_correct
  pm_l3_grp_guess_wrong_high
  pm_l3_grp_guess_wrong_low
  pm_l3_hit
  pm_l3_l2_co_hit
  pm_l3_l2_co_miss
  pm_l3_lat_ci_hit
  pm_l3_lat_ci_miss
  pm_l3_ld_hit
  pm_l3_ld_miss
  pm_l3_loc_guess_correct
  pm_l3_loc_guess_wrong
  pm_l3_miss
  pm_l3_p0_co_l31
  pm_l3_p0_co_mem
  pm_l3_p0_co_rty
  pm_l3_p0_grp_pump
  pm_l3_p0_lco_data
  pm_l3_p0_lco_no_data
  pm_l3_p0_lco_rty
  pm_l3_p0_node_pump
  pm_l3_p0_pf_rty
  pm_l3_p0_sn_hit
  pm_l3_p0_sn_inv
  pm_l3_p0_sn_miss
  pm_l3_p0_sys_pump
  pm_l3_p1_co_l31
  pm_l3_p1_co_mem
  pm_l3_p1_co_rty
  pm_l3_p1_grp_pump
  pm_l3_p1_lco_data
  pm_l3_p1_lco_no_data
  pm_l3_p1_lco_rty
  pm_l3_p1_node_pump
  pm_l3_p1_pf_rty
  pm_l3_p1_sn_hit
  pm_l3_p1_sn_inv
  pm_l3_p1_sn_miss
  pm_l3_p1_sys_pump
  pm_l3_pf_hit_l3
  pm_l3_sys_guess_correct
  pm_l3_sys_guess_wrong
  pm_l3_trans_pf
  pm_l3_wi0_busy
  pm_l3_wi_usage
  pm_non_tm_rst_sc
  pm_rd_clearing_sc
  pm_rd_forming_sc
  pm_rd_hit_pf
  pm_snp_tm_hit_m
  pm_snp_tm_hit_t
  pm_st_caused_fail
  pm_tm_cam_overflow
  pm_tm_cap_overflow
  pm_tm_fav_caused_fail
  pm_tm_ld_caused_fail
  pm_tm_ld_conf
  pm_tm_rst_sc
  pm_tm_sc_co
  pm_tm_st_caused_fail
  pm_tm_st_conf

Signed-off-by: Mamatha Inamdar <mamatha4@linux.vnet.ibm.com>
Acked-by: Ravi Bangoria <ravi.bangoria@linux.ibm.com>
Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com>
Cc: Jiri Olsa <jolsa@redhat.com>
Cc: Madhavan Srinivasan <maddy@linux.vnet.ibm.com>
Cc: Michael Ellerman <mpe@ellerman.id.au>
Cc: Namhyung Kim <namhyung@kernel.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Sukadev Bhattiprolu <sukadev@linux.vnet.ibm.com>
Fixes: 2a81fa3bb5 ("perf vendor events: Add power8 PMU events")
Link: http://lkml.kernel.org/r/154953186583.11022.14819560028300370163.stgit@localhost.localdomain
Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
2019-03-19 16:52:03 -03:00
..
arch perf vendor events: Remove P8 HW events which are not supported 2019-03-19 16:52:03 -03:00
Build tools: build: Fixup host c flags 2018-07-13 00:48:17 +09:00
jevents.c perf list: Add s390 support for detailed PMU event description 2018-07-24 14:49:09 -03:00
jevents.h Merge branch 'linus' into perf/core, to fix conflicts 2017-11-07 10:30:18 +01:00
jsmn.c
jsmn.h License cleanup: add SPDX GPL-2.0 license identifier to files with no license 2017-11-02 11:10:55 +01:00
json.c perf utils: Check verbose flag properly 2017-02-20 11:35:54 -03:00
json.h License cleanup: add SPDX GPL-2.0 license identifier to files with no license 2017-11-02 11:10:55 +01:00
pmu-events.h Merge branch 'linus' into perf/core, to fix conflicts 2017-11-07 10:30:18 +01:00
README perf vendor events: Add support for arch standard events 2018-03-16 13:54:35 -03:00

The contents of this directory allow users to specify PMU events in their
CPUs by their symbolic names rather than raw event codes (see example below).

The main program in this directory, is the 'jevents', which is built and
executed _BEFORE_ the perf binary itself is built.

The 'jevents' program tries to locate and process JSON files in the directory
tree tools/perf/pmu-events/arch/foo.

	- Regular files with '.json' extension in the name are assumed to be
	  JSON files, each of which describes a set of PMU events.

	- The CSV file that maps a specific CPU to its set of PMU events is to
	  be named 'mapfile.csv' (see below for mapfile format).

	- Directories are traversed, but all other files are ignored.

	- To reduce JSON event duplication per architecture, platform JSONs may
	  use "ArchStdEvent" keyword to dereference an "Architecture standard
	  events", defined in architecture standard JSONs.
	  Architecture standard JSONs must be located in the architecture root
	  folder. Matching is based on the "EventName" field.

The PMU events supported by a CPU model are expected to grouped into topics
such as Pipelining, Cache, Memory, Floating-point etc. All events for a topic
should be placed in a separate JSON file - where the file name identifies
the topic. Eg: "Floating-point.json".

All the topic JSON files for a CPU model/family should be in a separate
sub directory. Thus for the Silvermont X86 CPU:

	$ ls tools/perf/pmu-events/arch/x86/Silvermont_core
	Cache.json 	Memory.json 	Virtual-Memory.json
	Frontend.json 	Pipeline.json

The JSONs folder for a CPU model/family may be placed in the root arch
folder, or may be placed in a vendor sub-folder under the arch folder
for instances where the arch and vendor are not the same.

Using the JSON files and the mapfile, 'jevents' generates the C source file,
'pmu-events.c', which encodes the two sets of tables:

	- Set of 'PMU events tables' for all known CPUs in the architecture,
	  (one table like the following, per JSON file; table name 'pme_power8'
	  is derived from JSON file name, 'power8.json').

		struct pmu_event pme_power8[] = {

			...

			{
				.name = "pm_1plus_ppc_cmpl",
				.event = "event=0x100f2",
				.desc = "1 or more ppc insts finished,",
			},

			...
		}

	- A 'mapping table' that maps each CPU of the architecture, to its
	  'PMU events table'

		struct pmu_events_map pmu_events_map[] = {
		{
			.cpuid = "004b0000",
			.version = "1",
			.type = "core",
			.table = pme_power8
		},
			...

		};

After the 'pmu-events.c' is generated, it is compiled and the resulting
'pmu-events.o' is added to 'libperf.a' which is then used to build perf.

NOTES:
	1. Several CPUs can support same set of events and hence use a common
	   JSON file. Hence several entries in the pmu_events_map[] could map
	   to a single 'PMU events table'.

	2. The 'pmu-events.h' has an extern declaration for the mapping table
	   and the generated 'pmu-events.c' defines this table.

	3. _All_ known CPU tables for architecture are included in the perf
	   binary.

At run time, perf determines the actual CPU it is running on, finds the
matching events table and builds aliases for those events. This allows
users to specify events by their name:

	$ perf stat -e pm_1plus_ppc_cmpl sleep 1

where 'pm_1plus_ppc_cmpl' is a Power8 PMU event.

However some errors in processing may cause the perf build to fail.

Mapfile format
===============

The mapfile enables multiple CPU models to share a single set of PMU events.
It is required even if such mapping is 1:1.

The mapfile.csv format is expected to be:

	Header line
	CPUID,Version,Dir/path/name,Type

where:

	Comma:
		is the required field delimiter (i.e other fields cannot
		have commas within them).

	Comments:
		Lines in which the first character is either '\n' or '#'
		are ignored.

	Header line
		The header line is the first line in the file, which is
		always _IGNORED_. It can empty.

	CPUID:
		CPUID is an arch-specific char string, that can be used
		to identify CPU (and associate it with a set of PMU events
		it supports). Multiple CPUIDS can point to the same
		File/path/name.json.

		Example:
			CPUID == 'GenuineIntel-6-2E' (on x86).
			CPUID == '004b0100' (PVR value in Powerpc)
	Version:
		is the Version of the mapfile.

	Dir/path/name:
		is the pathname to the directory containing the CPU's JSON
		files, relative to the directory containing the mapfile.csv

	Type:
		indicates whether the events or "core" or "uncore" events.


	Eg:

	$ grep Silvermont tools/perf/pmu-events/arch/x86/mapfile.csv
	GenuineIntel-6-37,V13,Silvermont_core,core
	GenuineIntel-6-4D,V13,Silvermont_core,core
	GenuineIntel-6-4C,V13,Silvermont_core,core

	i.e the three CPU models use the JSON files (i.e PMU events) listed
	in the directory 'tools/perf/pmu-events/arch/x86/Silvermont_core'.