forked from luck/tmp_suning_uos_patched
5cfccd7f13
PowerPC's NUMA domain doesn't currently set up some of the newer sched-domains parameters. Brian Twichell <tbrian@us.ibm.com> discovered and diagnosed a 1.5% OLTP database regression on a 4 core POWER5 system that was due to the use of NUMA scheduling on ppc64. This patch applies some saneish values to the parameters, in line with other architectures. This solves the regression. Signed-off-by: Nick Piggin <npiggin@suse.de> Signed-off-by: Paul Mackerras <paulus@samba.org>
65 lines
1.3 KiB
C
65 lines
1.3 KiB
C
#ifndef _ASM_POWERPC_TOPOLOGY_H
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#define _ASM_POWERPC_TOPOLOGY_H
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#include <linux/config.h>
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#ifdef CONFIG_NUMA
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#include <asm/mmzone.h>
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static inline int cpu_to_node(int cpu)
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{
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return numa_cpu_lookup_table[cpu];
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}
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#define parent_node(node) (node)
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static inline cpumask_t node_to_cpumask(int node)
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{
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return numa_cpumask_lookup_table[node];
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}
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static inline int node_to_first_cpu(int node)
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{
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cpumask_t tmp;
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tmp = node_to_cpumask(node);
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return first_cpu(tmp);
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}
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#define pcibus_to_node(node) (-1)
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#define pcibus_to_cpumask(bus) (cpu_online_map)
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/* sched_domains SD_NODE_INIT for PPC64 machines */
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#define SD_NODE_INIT (struct sched_domain) { \
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.span = CPU_MASK_NONE, \
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.parent = NULL, \
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.groups = NULL, \
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.min_interval = 8, \
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.max_interval = 32, \
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.busy_factor = 32, \
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.imbalance_pct = 125, \
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.cache_hot_time = (10*1000000), \
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.cache_nice_tries = 1, \
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.per_cpu_gain = 100, \
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.busy_idx = 3, \
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.idle_id = 1, \
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.newidle_idx = 2, \
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.wake_idx = 1, \
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.flags = SD_LOAD_BALANCE \
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| SD_BALANCE_EXEC \
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| SD_BALANCE_NEWIDLE \
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| SD_WAKE_IDLE \
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| SD_WAKE_BALANCE, \
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.last_balance = jiffies, \
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.balance_interval = 1, \
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.nr_balance_failed = 0, \
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}
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#else
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#include <asm-generic/topology.h>
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#endif /* CONFIG_NUMA */
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#endif /* _ASM_POWERPC_TOPOLOGY_H */
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