Vidya Sagar 5dae15b21d phy: tegra: Add PCIe PIPE2UPHY support ... Synopsys DesignWare core based PCIe controllers in Tegra 194 SoC interface with Universal PHY (UPHY) module through a PIPE2UPHY (P2U) module. For each PCIe lane of a controller, there is a P2U unit instantiated at hardware level. This driver provides support for the programming required for each P2U that is going to be used for a PCIe controller. Signed-off-by: Vidya Sagar <vidyas@nvidia.com> Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Acked-by: Kishon Vijay Abraham I <kishon@ti.com> Acked-by: Thierry Reding <treding@nvidia.com>		2019-08-13 16:01:15 +01:00
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Kconfig	phy: tegra: Add PCIe PIPE2UPHY support	2019-08-13 16:01:15 +01:00
Makefile	phy: tegra: Add PCIe PIPE2UPHY support	2019-08-13 16:01:15 +01:00
phy-tegra194-p2u.c	phy: tegra: Add PCIe PIPE2UPHY support	2019-08-13 16:01:15 +01:00
xusb-tegra124.c	phy: for 5.2-rc	2019-07-01 12:11:43 +02:00
xusb-tegra186.c
xusb-tegra210.c	phy: for 5.2-rc	2019-07-01 12:11:43 +02:00
xusb.c	treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 288	2019-06-05 17:36:37 +02:00
xusb.h	treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 288	2019-06-05 17:36:37 +02:00