forked from luck/tmp_suning_uos_patched
ad524d46f3
When a 64-bit x86 processor runs in 32-bit PAE mode, a pte can
potentially have the same number of physical address bits as the
64-bit host ("Enhanced Legacy PAE Paging"). This means, in theory,
we could have up to 52 bits of physical address in a pte.
The 32-bit kernel uses a 32-bit unsigned long to represent a pfn.
This means that it can only represent physical addresses up to 32+12=44
bits wide. Rather than widening pfns everywhere, just set 2^44 as the
Linux x86_32-PAE architectural limit for physical address size.
This is a bugfix for two cases:
1. running a 32-bit PAE kernel on a machine with
more than 64GB RAM.
2. running a 32-bit PAE Xen guest on a host machine with
more than 64GB RAM
In both cases, a pte could need to have more than 36 bits of physical,
and masking it to 36-bits will cause fairly severe havoc.
Signed-off-by: Jeremy Fitzhardinge <jeremy.fitzhardinge@citrix.com>
Cc: Jan Beulich <jbeulich@novell.com>
Cc: <stable@kernel.org>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
115 lines
2.5 KiB
C
115 lines
2.5 KiB
C
#ifndef _ASM_X86_PAGE_32_H
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#define _ASM_X86_PAGE_32_H
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/*
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* This handles the memory map.
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*
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* A __PAGE_OFFSET of 0xC0000000 means that the kernel has
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* a virtual address space of one gigabyte, which limits the
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* amount of physical memory you can use to about 950MB.
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*
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* If you want more physical memory than this then see the CONFIG_HIGHMEM4G
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* and CONFIG_HIGHMEM64G options in the kernel configuration.
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*/
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#define __PAGE_OFFSET _AC(CONFIG_PAGE_OFFSET, UL)
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#ifdef CONFIG_X86_PAE
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/* 44=32+12, the limit we can fit into an unsigned long pfn */
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#define __PHYSICAL_MASK_SHIFT 44
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#define __VIRTUAL_MASK_SHIFT 32
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#define PAGETABLE_LEVELS 3
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#ifndef __ASSEMBLY__
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typedef u64 pteval_t;
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typedef u64 pmdval_t;
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typedef u64 pudval_t;
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typedef u64 pgdval_t;
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typedef u64 pgprotval_t;
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typedef u64 phys_addr_t;
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typedef union {
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struct {
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unsigned long pte_low, pte_high;
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};
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pteval_t pte;
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} pte_t;
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#endif /* __ASSEMBLY__
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*/
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#else /* !CONFIG_X86_PAE */
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#define __PHYSICAL_MASK_SHIFT 32
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#define __VIRTUAL_MASK_SHIFT 32
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#define PAGETABLE_LEVELS 2
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#ifndef __ASSEMBLY__
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typedef unsigned long pteval_t;
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typedef unsigned long pmdval_t;
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typedef unsigned long pudval_t;
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typedef unsigned long pgdval_t;
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typedef unsigned long pgprotval_t;
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typedef unsigned long phys_addr_t;
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typedef union {
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pteval_t pte;
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pteval_t pte_low;
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} pte_t;
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#endif /* __ASSEMBLY__ */
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#endif /* CONFIG_X86_PAE */
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#ifndef __ASSEMBLY__
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typedef struct page *pgtable_t;
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#endif
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#ifdef CONFIG_HUGETLB_PAGE
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#define HAVE_ARCH_HUGETLB_UNMAPPED_AREA
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#endif
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#ifndef __ASSEMBLY__
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#define __phys_addr(x) ((x) - PAGE_OFFSET)
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#define __phys_reloc_hide(x) RELOC_HIDE((x), 0)
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#ifdef CONFIG_FLATMEM
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#define pfn_valid(pfn) ((pfn) < max_mapnr)
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#endif /* CONFIG_FLATMEM */
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extern int nx_enabled;
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/*
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* This much address space is reserved for vmalloc() and iomap()
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* as well as fixmap mappings.
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*/
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extern unsigned int __VMALLOC_RESERVE;
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extern int sysctl_legacy_va_layout;
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#define VMALLOC_RESERVE ((unsigned long)__VMALLOC_RESERVE)
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#define MAXMEM (-__PAGE_OFFSET - __VMALLOC_RESERVE)
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#ifdef CONFIG_X86_USE_3DNOW
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#include <asm/mmx.h>
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static inline void clear_page(void *page)
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{
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mmx_clear_page(page);
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}
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static inline void copy_page(void *to, void *from)
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{
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mmx_copy_page(to, from);
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}
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#else /* !CONFIG_X86_USE_3DNOW */
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#include <linux/string.h>
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static inline void clear_page(void *page)
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{
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memset(page, 0, PAGE_SIZE);
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}
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static inline void copy_page(void *to, void *from)
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{
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memcpy(to, from, PAGE_SIZE);
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}
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#endif /* CONFIG_X86_3DNOW */
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#endif /* !__ASSEMBLY__ */
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#endif /* _ASM_X86_PAGE_32_H */
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