forked from luck/tmp_suning_uos_patched
cba1cce054
Introduce new assembler functions to avoid use temporary stack buffers in glue code. This also allows use of vector instructions for xoring output in CTR and CBC modes and construction of IVs for CTR mode. ECB mode sees ~0.5% decrease in speed because added one extra function call. CBC mode decryption and CTR mode benefit from vector operations and gain ~2%. Signed-off-by: Jussi Kivilinna <jussi.kivilinna@mbnet.fi> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
92 lines
2.7 KiB
ArmAsm
92 lines
2.7 KiB
ArmAsm
/*
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* Shared glue code for 128bit block ciphers, AVX assembler macros
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*
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* Copyright (c) 2012 Jussi Kivilinna <jussi.kivilinna@mbnet.fi>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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*/
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#define load_8way(src, x0, x1, x2, x3, x4, x5, x6, x7) \
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vmovdqu (0*16)(src), x0; \
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vmovdqu (1*16)(src), x1; \
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vmovdqu (2*16)(src), x2; \
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vmovdqu (3*16)(src), x3; \
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vmovdqu (4*16)(src), x4; \
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vmovdqu (5*16)(src), x5; \
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vmovdqu (6*16)(src), x6; \
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vmovdqu (7*16)(src), x7;
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#define store_8way(dst, x0, x1, x2, x3, x4, x5, x6, x7) \
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vmovdqu x0, (0*16)(dst); \
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vmovdqu x1, (1*16)(dst); \
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vmovdqu x2, (2*16)(dst); \
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vmovdqu x3, (3*16)(dst); \
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vmovdqu x4, (4*16)(dst); \
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vmovdqu x5, (5*16)(dst); \
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vmovdqu x6, (6*16)(dst); \
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vmovdqu x7, (7*16)(dst);
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#define store_cbc_8way(src, dst, x0, x1, x2, x3, x4, x5, x6, x7) \
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vpxor (0*16)(src), x1, x1; \
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vpxor (1*16)(src), x2, x2; \
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vpxor (2*16)(src), x3, x3; \
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vpxor (3*16)(src), x4, x4; \
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vpxor (4*16)(src), x5, x5; \
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vpxor (5*16)(src), x6, x6; \
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vpxor (6*16)(src), x7, x7; \
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store_8way(dst, x0, x1, x2, x3, x4, x5, x6, x7);
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#define inc_le128(x, minus_one, tmp) \
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vpcmpeqq minus_one, x, tmp; \
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vpsubq minus_one, x, x; \
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vpslldq $8, tmp, tmp; \
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vpsubq tmp, x, x;
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#define load_ctr_8way(iv, bswap, x0, x1, x2, x3, x4, x5, x6, x7, t0, t1, t2) \
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vpcmpeqd t0, t0, t0; \
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vpsrldq $8, t0, t0; /* low: -1, high: 0 */ \
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vmovdqa bswap, t1; \
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\
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/* load IV and byteswap */ \
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vmovdqu (iv), x7; \
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vpshufb t1, x7, x0; \
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\
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/* construct IVs */ \
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inc_le128(x7, t0, t2); \
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vpshufb t1, x7, x1; \
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inc_le128(x7, t0, t2); \
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vpshufb t1, x7, x2; \
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inc_le128(x7, t0, t2); \
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vpshufb t1, x7, x3; \
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inc_le128(x7, t0, t2); \
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vpshufb t1, x7, x4; \
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inc_le128(x7, t0, t2); \
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vpshufb t1, x7, x5; \
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inc_le128(x7, t0, t2); \
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vpshufb t1, x7, x6; \
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inc_le128(x7, t0, t2); \
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vmovdqa x7, t2; \
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vpshufb t1, x7, x7; \
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inc_le128(t2, t0, t1); \
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vmovdqu t2, (iv);
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#define store_ctr_8way(src, dst, x0, x1, x2, x3, x4, x5, x6, x7) \
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vpxor (0*16)(src), x0, x0; \
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vpxor (1*16)(src), x1, x1; \
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vpxor (2*16)(src), x2, x2; \
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vpxor (3*16)(src), x3, x3; \
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vpxor (4*16)(src), x4, x4; \
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vpxor (5*16)(src), x5, x5; \
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vpxor (6*16)(src), x6, x6; \
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vpxor (7*16)(src), x7, x7; \
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store_8way(dst, x0, x1, x2, x3, x4, x5, x6, x7);
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