forked from luck/tmp_suning_uos_patched
a683b14df8
two reasons: 1. GPIO namings and their mode definitions are conceptually not part of the PXA register definitions 2. this is actually a temporary move in the transition of PXA2xx to use MFP-alike APIs (as what PXA3xx is now doing), so that legacy code will still work and new code can be added in step by step Signed-off-by: eric miao <eric.miao@marvell.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
155 lines
2.7 KiB
C
155 lines
2.7 KiB
C
/*
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* linux/arch/arm/mach-sa1100/clock.c
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*/
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#include <linux/module.h>
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#include <linux/kernel.h>
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#include <linux/list.h>
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#include <linux/errno.h>
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#include <linux/err.h>
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#include <linux/string.h>
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#include <linux/clk.h>
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#include <linux/spinlock.h>
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#include <linux/platform_device.h>
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#include <linux/delay.h>
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#include <asm/arch/pxa-regs.h>
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#include <asm/arch/pxa2xx-gpio.h>
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#include <asm/hardware.h>
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#include "devices.h"
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#include "generic.h"
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#include "clock.h"
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static LIST_HEAD(clocks);
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static DEFINE_MUTEX(clocks_mutex);
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static DEFINE_SPINLOCK(clocks_lock);
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static struct clk *clk_lookup(struct device *dev, const char *id)
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{
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struct clk *p;
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list_for_each_entry(p, &clocks, node)
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if (strcmp(id, p->name) == 0 && p->dev == dev)
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return p;
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return NULL;
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}
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struct clk *clk_get(struct device *dev, const char *id)
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{
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struct clk *p, *clk = ERR_PTR(-ENOENT);
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mutex_lock(&clocks_mutex);
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p = clk_lookup(dev, id);
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if (!p)
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p = clk_lookup(NULL, id);
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if (p)
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clk = p;
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mutex_unlock(&clocks_mutex);
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return clk;
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}
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EXPORT_SYMBOL(clk_get);
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void clk_put(struct clk *clk)
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{
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}
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EXPORT_SYMBOL(clk_put);
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int clk_enable(struct clk *clk)
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{
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unsigned long flags;
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spin_lock_irqsave(&clocks_lock, flags);
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if (clk->enabled++ == 0)
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clk->ops->enable(clk);
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spin_unlock_irqrestore(&clocks_lock, flags);
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if (clk->delay)
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udelay(clk->delay);
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return 0;
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}
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EXPORT_SYMBOL(clk_enable);
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void clk_disable(struct clk *clk)
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{
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unsigned long flags;
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WARN_ON(clk->enabled == 0);
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spin_lock_irqsave(&clocks_lock, flags);
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if (--clk->enabled == 0)
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clk->ops->disable(clk);
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spin_unlock_irqrestore(&clocks_lock, flags);
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}
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EXPORT_SYMBOL(clk_disable);
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unsigned long clk_get_rate(struct clk *clk)
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{
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unsigned long rate;
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rate = clk->rate;
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if (clk->ops->getrate)
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rate = clk->ops->getrate(clk);
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return rate;
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}
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EXPORT_SYMBOL(clk_get_rate);
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static void clk_gpio27_enable(struct clk *clk)
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{
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pxa_gpio_mode(GPIO11_3_6MHz_MD);
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}
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static void clk_gpio27_disable(struct clk *clk)
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{
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}
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static const struct clkops clk_gpio27_ops = {
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.enable = clk_gpio27_enable,
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.disable = clk_gpio27_disable,
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};
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void clk_cken_enable(struct clk *clk)
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{
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CKEN |= 1 << clk->cken;
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}
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void clk_cken_disable(struct clk *clk)
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{
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CKEN &= ~(1 << clk->cken);
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}
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const struct clkops clk_cken_ops = {
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.enable = clk_cken_enable,
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.disable = clk_cken_disable,
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};
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static struct clk common_clks[] = {
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{
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.name = "GPIO27_CLK",
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.ops = &clk_gpio27_ops,
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.rate = 3686400,
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},
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};
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void clks_register(struct clk *clks, size_t num)
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{
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int i;
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mutex_lock(&clocks_mutex);
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for (i = 0; i < num; i++)
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list_add(&clks[i].node, &clocks);
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mutex_unlock(&clocks_mutex);
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}
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static int __init clk_init(void)
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{
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clks_register(common_clks, ARRAY_SIZE(common_clks));
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return 0;
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}
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arch_initcall(clk_init);
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