forked from luck/tmp_suning_uos_patched
623b4ac4bf
Both the original arch/sh/drivers/dma/dma-sh.c and the new SH dmaengine drivers do not take into account bits 3:2 of the Transfer Size field in the CHCR register, besides, bit-field defines set bit 2, but the mask only passes bits 1:0 through. TS_16BLK and TS_32BLK macros are bogus too. This patch fixes all these issues for sh7722 and sh7724, other CPUs stay unchanged and might need to be fixed too. Signed-off-by: Guennadi Liakhovetski <g.liakhovetski@gmx.de> Acked-by: Dan Williams <dan.j.williams@intel.com> Signed-off-by: Paul Mundt <lethal@linux-sh.org> |
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.. | ||
asm | ||
cpu-common/cpu | ||
cpu-sh2/cpu | ||
cpu-sh2a/cpu | ||
cpu-sh3/cpu | ||
cpu-sh4/cpu | ||
cpu-sh5/cpu | ||
mach-common/mach | ||
mach-dreamcast/mach | ||
mach-ecovec24/mach | ||
mach-kfr2r09/mach | ||
mach-landisk/mach | ||
mach-migor/mach | ||
mach-se/mach | ||
mach-sh03/mach |